Patents by Inventor Naonori Fujiwara
Naonori Fujiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11965246Abstract: A method of depositing a film over a substrate covered with at least an insulating film provided with a groove is provided. In the method, a deposition process for depositing the film is performed by supplying at least a raw material gas to the substrate. The raw material gas is supplied while changing an amount of the raw material gas supplied per unit time.Type: GrantFiled: June 10, 2019Date of Patent: April 23, 2024Assignee: Tokyo Electron LimitedInventor: Naonori Fujiwara
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Publication number: 20190390346Abstract: A method of depositing a film over a substrate covered with at least an insulating film provided with a groove is provided. In the method, a deposition process for depositing the film is performed by supplying at least a raw material gas to the substrate. The raw material gas is supplied while changing an amount of the raw material gas supplied per unit time.Type: ApplicationFiled: June 10, 2019Publication date: December 26, 2019Inventor: Naonori Fujiwara
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Patent number: 9178006Abstract: A method for reducing the leakage current in DRAM MIM capacitors comprises forming a multi-layer dielectric stack from an amorphous highly doped material, an amorphous high band gap material, and a lightly-doped or non-doped material. The highly doped material will remain amorphous (<30% crystalline) after an anneal step. The high band gap material will remain amorphous (<30% crystalline) after an anneal step. The lightly-doped or non-doped material will become crystalline (?30% crystalline) after an anneal step. The high band gap material is formed between the amorphous highly doped material and the lightly or non-doped material and provides an intermediate barrier to conduction through the multi-layer dielectric stack.Type: GrantFiled: February 10, 2014Date of Patent: November 3, 2015Assignees: Intermolecular, Inc., Elpida Memory, Inc.Inventors: Xiangxin Rui, Hanhong Chen, Naonori Fujiwara, Imran Hashim, Kenichi Koyanagi
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Publication number: 20150228710Abstract: A method for reducing the leakage current in DRAM MIM capacitors comprises forming a multi-layer dielectric stack from an amorphous highly doped material, an amorphous high band gap material, and a lightly-doped or non-doped material. The highly doped material will remain amorphous (<30% crystalline) after an anneal step. The high band gap material will remain amorphous (<30% crystalline) after an anneal step. The lightly-doped or non-doped material will become crystalline (?30% crystalline) after an anneal step. The high band gap material is formed between the amorphous highly doped material and the lightly or non-doped material and provides an intermediate barrier to conduction through the multi-layer dielectric stack.Type: ApplicationFiled: February 10, 2014Publication date: August 13, 2015Applicants: Elpida Memory, Inc, Intermolecular, Inc.Inventors: Xiangxin Rui, Hanhong Chen, Naonori Fujiwara, Imran Hashim, Kenichi Koyanagi
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Publication number: 20130337625Abstract: The present invention provides a method for manufacturing a semiconductor device including a metal compound film formation process based on an atomic layer deposition (ALD) with repeating a plurality of cycles in which a supply time of a metallic source gas at the first time of the cycles is longer than a supply time of the source gas at the second time or later of the cycles, the ALD including, as one cycle, supplying the metallic source gas to adsorb a metallic source onto a foundation; purging the metallic source gas from a film-forming space; supplying a reactant gas to convert the metallic source into a corresponding metal compound; and purging the reactant gas.Type: ApplicationFiled: June 10, 2013Publication date: December 19, 2013Inventor: Naonori FUJIWARA
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Patent number: 8574998Abstract: A method for reducing the leakage current in DRAM MIM capacitors comprises forming a multi-layer dielectric stack from an amorphous highly doped material, an amorphous high band gap material, and a lightly or non-doped material. The highly doped material will remain amorphous (<30% crystalline) after an anneal step. The high band gap material will remain amorphous (<30% crystalline) after an anneal step. The lightly or non-doped material will become crystalline (?30% crystalline) after an anneal step. The high band gap material is formed between the amorphous highly doped material and the lightly or non-doped material and provides an intermediate barrier to conduction through the multi-layer dielectric stack.Type: GrantFiled: December 5, 2011Date of Patent: November 5, 2013Assignees: Intermolecular, Inc., Elpida Memory, Inc.Inventors: Sandra Malhotra, Kenichi Koyanagi, Hiroyuki Ode, Xiangxin Rui, Takashi Arao, Naonori Fujiwara
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Publication number: 20130285202Abstract: To provide a semiconductor device including a capacitor which includes a cylindrical or columnar lower electrode, a support film in contact with the upper portion of the lower electrode for supporting the lower electrode, a dielectric film covering the lower electrode and the support film, and an upper electrode facing the lower electrode with the dielectric film interposed therebetween, wherein the dielectric film has a first thickness on the upper surface of the support film and a second thickness thinner than the first thickness on the side surface of the lower electrode, and thereby the mechanical strength of the support film is increased.Type: ApplicationFiled: March 12, 2013Publication date: October 31, 2013Applicant: ELPIDA MEMORY, INC.Inventors: Kenichi KOYANAGI, Takashi ARAO, Naonori FUJIWARA, Tomohiro UNO
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Publication number: 20130143379Abstract: A method for reducing the leakage current in DRAM MIM capacitors comprises forming a multi-layer dielectric stack from an amorphous highly doped material, an amorphous high band gap material, and a lightly or non-doped material. The highly doped material will remain amorphous (<30% crystalline) after an anneal step. The high band gap material will remain amorphous (<30% crystalline) after an anneal step. The lightly or non-doped material will become crystalline (?30% crystalline) after an anneal step. The high band gap material is formed between the amorphous highly doped material and the lightly or non-doped material and provides an intermediate barrier to conduction through the multi-layer dielectric stack.Type: ApplicationFiled: December 5, 2011Publication date: June 6, 2013Applicants: Elpida Memory, Inc., Intermolecular, Inc.Inventors: Sandra Malholtra, Kenichi Koyanagi, Hiroyuki Ode, Xiangxin Rui, Takashi Arao, Naonori Fujiwara
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Publication number: 20120235276Abstract: A method for fabricating a dynamic random access memory capacitor is disclosed. The method may comprise depositing a first titanium nitride (TiN) electrode; creating a first layer of titanium dioxide (TiO2) on the first TiN electrode; depositing a dielectric material on the first layer of titanium dioxide; and depositing a second TiN electrode on the dielectric material.Type: ApplicationFiled: March 18, 2011Publication date: September 20, 2012Applicant: INTERMOLECULAR, INC.Inventors: Xiangxin Rui, Hanhong Chen, Edward Haywood, Sandra Malhotra, Takashi Arao, Naonori Fujiwara, Toshiyuki Hirota, Takakazu Kiyomura, Kenichi Koyanagi
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Publication number: 20120181660Abstract: A semiconductor device comprises a capacitor, the capacitor including a lower electrode, a dielectric film containing crystalline zirconium oxide formed on the lower electrode, and an upper electrode containing a titanium nitride film contacting to the dielectric film, wherein the dielectric film comprises an amorphous film on an interface with the titanium nitride film, thereby preventing the reduction of the thickness of the titanium nitride film formed on the dielectric electrode with a low leakage current and a high dielectric constant.Type: ApplicationFiled: January 13, 2012Publication date: July 19, 2012Applicant: ELPIDA MEMORY, INC.Inventor: Naonori FUJIWARA
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Publication number: 20120149193Abstract: A method for forming a semiconductor device includes the following processes. An insulating film is formed over a semiconductor substrate. A hole is formed in the insulating film. A film including ZrAlO is formed over the insulating film and in the hole. Forming the film including ZrAlO may include, but is not limited to, the following processes. A first precursor including zirconium and a second precursor including aluminum are supplied into a reaction chamber at a supply amount ratio of the first precursor to the second precursor in the range from 2.5 to 3.5. The first precursor and the second precursor are exhausted from the reaction chamber. An oxidant is supplied into the reaction chamber to oxidize zirconium and aluminum. The oxidant is exhausted from the reaction chamber.Type: ApplicationFiled: December 6, 2011Publication date: June 14, 2012Applicant: ELPIDA MEMORY, INC.Inventor: Naonori FUJIWARA
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Publication number: 20110048769Abstract: An exemplary aspect of the invention provides an insulating film which has a high dielectric constant and has small leakage current even when it is sandwiched between electrodes. The insulating film comprises two zirconium oxide layers in crystallized state; and an intergranular isolating layer composed of an amorphous material having a dielectric constant higher than that of zirconium oxide in crystallized state; wherein the intergranular isolating layer is sandwiched between the two zirconium oxide layers. The insulating film is properly used as a capacitive insulating film in a semiconductor device comprising a memory cell including a capacitor element having the capacitive insulating film between an upper electrode and a lower electrode, or as an intergate insulating film in a semiconductor device comprising a nonvolatile memory device having the intergate insulating film between a control gate electrode and a floating gate electrode.Type: ApplicationFiled: August 30, 2010Publication date: March 3, 2011Applicant: ELPIDA MEMORY, INC.Inventor: Naonori FUJIWARA
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Publication number: 20090289327Abstract: A capacitor insulating film includes a laminated structure in which aluminum oxide films and titanium dioxide films are alternately laminated, wherein the titanium dioxide films each have a rutile crystal structure, and the ratio of the total thickness of the aluminum oxide films to the total thickness of the laminated structure ranges from 3 to 8%.Type: ApplicationFiled: May 21, 2009Publication date: November 26, 2009Inventor: Naonori Fujiwara
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Patent number: 7491652Abstract: A process for manufacturing semiconductor devices in an in-line processing includes the steps of: forming a silicon nitride film on a semiconductor wafer by nitrization in a reactor chamber having an inner pressure at a specific pressure; reducing the inner pressure from the specific pressure; raising the inner pressure up to the specific pressure; replacing the semiconductor wafer with another semiconductor wafer; and forming a nitride film on the another semiconductor wafer at the specific pressure.Type: GrantFiled: June 26, 2006Date of Patent: February 17, 2009Assignee: Elpida Memory, Inc.Inventors: Naonori Fujiwara, Hiroyuki Kitamura
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Publication number: 20070004223Abstract: A process for manufacturing semiconductor devices in an in-line processing includes the steps of: forming a silicon nitride film on a semiconductor wafer by nitrization in a reactor chamber having an inner pressure at a specific pressure; reducing the inner pressure from the specific pressure; raising the inner pressure up to the specific pressure; replacing the semiconductor wafer with another semiconductor wafer; and forming a nitride film on the another semiconductor wafer at the specific pressure.Type: ApplicationFiled: June 26, 2006Publication date: January 4, 2007Applicant: ELPIDA MEMORY, INC.Inventors: Naonori Fujiwara, Hiroyuki Kitamura