Patents by Inventor Naotaka Iio

Naotaka Iio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device
    Patent number: 11088118
    Abstract: According to an embodiment, a semiconductor device includes a first metal plate, a second metal plate, and two or more semiconductor units. The two or more semiconductor units are disposed on the first metal plate. The each of the two or more semiconductor units includes a first metal member, a second metal member, and a semiconductor element. The first metal member has a first connection surface connected to the first major surface. The second metal member has a second connection surface connected to the second major surface. The semiconductor element includes an active region having surfaces respectively opposing the first connection surface and the second connection surface. A surface area of the first connection surface is greater than a surface area of the surface of the active region opposing the first connection surface. A surface area of the second connection surface is greater than a surface area of the surface of the active region opposing the second connection surface.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: August 10, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Kazuyasu Takimoto, Yuta Ichikura, Toshiharu Ohbu, Hiroaki Ito, Naotake Watanabe, Nobumitsu Tada, Naoki Yamanari, Daisuke Hiratsuka, Hiroki Sekiya, Yuuji Hisazato, Naotaka Iio, Hitoshi Matsumura
  • SEMICONDUCTOR DEVICE
    Publication number: 20200321320
    Abstract: According to an embodiment, a semiconductor device includes a first metal plate, a second metal plate, and two or more semiconductor units. The two or more semiconductor units are disposed on the first metal plate. The each of the two or more semiconductor units includes a first metal member, a second metal member, and a semiconductor element. The first metal member has a first connection surface connected to the first major surface. The second metal member has a second connection surface connected to the second major surface. The semiconductor element includes an active region having surfaces respectively opposing the first connection surface and the second connection surface. A surface area of the first connection surface is greater than a surface area of the surface of the active region opposing the first connection surface. A surface area of the second connection surface is greater than a surface area of the surface of the active region opposing the second connection surface.
    Type: Application
    Filed: November 30, 2017
    Publication date: October 8, 2020
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Kazuyasu TAKIMOTO, Yuta ICHIKURA, Toshiharu OHBU, Hiroaki ITO, Naotake WATANABE, Nobumitsu TADA, Naoki YAMANARI, Daisuke HIRATSUKA, Hiroki SEKIYA, Yuuji HISAZATO, Naotaka IIO, Hitoshi MATSUMURA
  • Pressure contact type semiconductor device stack
    Patent number: 10283478
    Abstract: To provide a pressure contact type semiconductor device stack which can uniformly pressurize pressure contact type semiconductor devices irrespective of presence or absence of a notch portion of the pressure contact type semiconductor device, and can prevent thermal destruction of the relevant pressure contact type semiconductor device.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: May 7, 2019
    Assignees: Toshiba Mitsubishi-Electric Industrial Systems Corporation, Toshiba Energy Systems & Solutions Corporation
    Inventors: Kenichiro Omote, Ryo Nakajima, Makoto Mukunoki, Daisuke Yoshizawa, Yuta Ichikura, Naotaka Iio
  • PRESSURE CONTACT TYPE SEMICONDUCTOR DEVICE STACK
    Publication number: 20180040581
    Abstract: To provide a pressure contact type semiconductor device stack which can uniformly pressurize pressure contact type semiconductor devices irrespective of presence or absence of a notch portion of the pressure contact type semiconductor device, and can prevent thermal destruction of the relevant pressure contact type semiconductor device.
    Type: Application
    Filed: October 18, 2017
    Publication date: February 8, 2018
    Applicants: Toshiba Mitsubishi-Electric Industrial Systems Corporation, Kabushiki Kaisha Toshiba
    Inventors: Kenichiro OMOTE, Ryo NAKAJIMA, Makoto MUKUNOKI, Daisuke YOSHIZAWA, Yuta ICHIKURA, Naotaka IIO
  • SEMICONDUCTOR POWER CONVERSION DEVICE
    Publication number: 20140085954
    Abstract: A semiconductor power conversion device includes n (where n is a natural number) mutually isolated inverse conversion devices that output three-level voltage; and an inverse conversion device, isolated from the inverse conversion devices, that employs as input DC voltage a voltage VDCS of one half or one third of the input DC voltage VDC of the inverse conversion devices and that outputs three-level voltage; and the inverse conversion devices and the inverse conversion device are series-cascade connected, and output a maximum VDC×n+VDCS.
    Type: Application
    Filed: January 6, 2012
    Publication date: March 27, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryuta Hasegawa, Yosuke Nakazawa, Naotaka Iio
  • Control system for power conversion system
    Patent number: 5907483
    Abstract: A control system for a power conversion system, composed of at least one voltage source type converter and a transformer.
    Type: Grant
    Filed: April 29, 1998
    Date of Patent: May 25, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naotaka Iio, Hajime Yamamoto