Patents by Inventor Naotaka Kumagai

Naotaka Kumagai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11519825
    Abstract: A temperature abnormality detection system includes: measurement devices; and a processor to determine temperature abnormality using a first temperature T1, a second temperature T2, and a third temperature T3. The processor determines occurrence of temperature abnormality when any one of following conditions is satisfied: (A) T1>A0 or T2>A0 or T3>A0; (B) T1>A1 and (T2?T1>A4 or T2?T1<0) and T2>A2 and T3>A3; (C) T1>A1 and T2?T1>A4 and T3>A3; (D) T1>A1 and T2?T1>A4 and (T3?T2>A5 or T3?T1>A6); and (E) T1>A1 and T2?T1<0 and (T3?T2>A7 or T3?T1>A8), where A1<A0, A2<A0, and A3<A0.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: December 6, 2022
    Assignee: Central Japan Railway Company
    Inventors: Masashi Itoyama, Takeshi Narita, Naotaka Kumagai
  • Publication number: 20220097566
    Abstract: A cell balancing device comprises: a capacity adjustment circuit including a plurality of pairs of series-connected switch elements and resistors connected in parallel with respective battery cells, and configured to adjust respective capacities of the battery cells; a processor; and a watchdog unit configured to monitor the processor, and reset the processor in the case where the processor is abnormal. The processor is configured to: transition to a sleep state when an ignition of a vehicle is turned off, and, in the sleep state, control the switch elements to adjust the capacities of the battery cells; and, when adjusting the capacities of the battery cells, limit the number of simultaneously discharged battery cells to a predetermined number so that a current flowing to the processor is less than a predetermined value.
    Type: Application
    Filed: December 9, 2019
    Publication date: March 31, 2022
    Inventors: Junya Tanaka, Naotaka Kumagai
  • Publication number: 20200049594
    Abstract: A temperature abnormality detection system includes: measurement devices; and a processor to determine temperature abnormality using a first temperature T1, a second temperature T2, and a third temperature T3. The processor determines occurrence of temperature abnormality when any one of following conditions is satisfied: (A) T1>A0 or T2>A0 or T3 >A0; (B) T1>A1 and (T2?T1>A4 or T2?T1<0) and T2>A2 and T3>A3; (C) T1>A1 and T2?T1>A4 and T3>A3; (D) T1>A1 and T2?T1>A4 and (T3?T2>A5 or T3?T1>A6); and (E) T1>A1 and T2?T1<0 and (T3?T2>A7 or T3?T1>A8), where A1<A0, A2<A0, and A3<A0.
    Type: Application
    Filed: August 7, 2019
    Publication date: February 13, 2020
    Inventors: Masashi Itoyama, Takeshi Narita, Naotaka Kumagai