Patents by Inventor Naotaka Matsuda

Naotaka Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10566966
    Abstract: A semiconductor device of the present invention suppresses high frequency noise caused in a semiconductor device incorporating SiC elements. The semiconductor device includes semiconductor elements connected in series, a SiC diode element connected in parallel to the semiconductor element, and an oscillation suppressing circuit being connected in parallel to the semiconductor element and the SiC diode element and suppressing voltage fluctuation caused in the SiC diode element in response to turn-ons of the semiconductor element. The oscillation suppressing circuit suppresses voltage fluctuation caused in the SiC diode element in response to turn-ons of the semiconductor element thereby improving reliability of the semiconductor device.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: February 18, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Naotaka Matsuda, Seiki Igarashi, Hideaki Kakiki, Susumu Iwamoto
  • Publication number: 20180309438
    Abstract: A semiconductor device of the present invention suppresses high frequency noise caused in a semiconductor device incorporating SiC elements. The semiconductor device includes semiconductor elements connected in series, a SiC diode element connected in parallel to the semiconductor element, and an oscillation suppressing circuit being connected in parallel to the semiconductor element and the SiC diode element and suppressing voltage fluctuation caused in the SiC diode element in response to turn-ons of the semiconductor element. The oscillation suppressing circuit suppresses voltage fluctuation caused in the SiC diode element in response to turn-ons of the semiconductor element thereby improving reliability of the semiconductor device.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 25, 2018
    Inventors: Naotaka MATSUDA, Seiki IGARASHI, Hideaki KAKIKI, Susumu IWAMOTO
  • Patent number: 9667155
    Abstract: A switching power supply includes: a transformer having a primary coil and a secondary coil; a switching element that is connected in series to the primary coil of the transformer so as to turn a direct-current input voltage applied to the primary coil of the transformer ON and OFF; a rectifying and smoothing circuit that rectifies a voltage induced in the secondary coil of the transformer to generate a direct-current output voltage; and a control circuit that turns the switching element ON and OFF in accordance with the direct-current output voltage, wherein the control circuit includes an input correction circuit that detects a switching period of the switching element and limits a peak value of a current flowing through the switching element in accordance with the detected switching period.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: May 30, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Naotaka Matsuda
  • Publication number: 20160204705
    Abstract: A switching power supply includes: a transformer having a primary coil and a secondary coil; a switching element that is connected in series to the primary coil of the transformer so as to turn a direct-current input voltage applied to the primary coil of the transformer ON and OFF; a rectifying and smoothing circuit that rectifies a voltage induced in the secondary coil of the transformer to generate a direct-current output voltage; and a control circuit that turns the switching element ON and OFF in accordance with the direct-current output voltage, wherein the control circuit includes an input correction circuit that detects a switching period of the switching element and limits a peak value of a current flowing through the switching element in accordance with the detected switching period.
    Type: Application
    Filed: January 5, 2016
    Publication date: July 14, 2016
    Applicant: Fuji Electric Co., Ltd.
    Inventor: Naotaka MATSUDA
  • Patent number: 6934139
    Abstract: An intelligent power module includes semiconductor switching devices, drive circuits, a variety of detecting circuits and warning circuits for detecting a fatal abnormal condition and a precursory abnormal condition thereof in the switching devices, the drive circuits and so forth, abnormal condition detecting logic devices and drive circuits for protecting the switching devices when the detecting circuits and the warning circuits detect the abnormal condition, and control circuits and a transmission circuit for outputting a signal based on detection of the abnormal condition. The transmission circuit has an output terminal for outputting alarm signals when the fatal abnormal condition is detected, and an output terminal for outputting abnormality factor discrimination signals indicating abnormality factors contributing to the fatal abnormal condition and the precursory abnormal condition.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: August 23, 2005
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventors: Naoki Kumagai, Kazunori Oyabe, Naotaka Matsuda
  • Patent number: 6678180
    Abstract: A power semiconductor module that automatically sets an optimum dead time without being affected by the switching characteristics or driving mode of individual power semiconductor devices. The power semiconductor module includes a pair of IGBTs disposed in an upper and lower arm, respectively, and driving circuits for driving IGBTs. The power semiconductor module includes current detecting circuits and zero current detecting circuits for detecting that the output current of each of the IGBTs has become nearly zero, an inverting circuit, upper arm driving circuit and lower arm driving circuit for generating actual driving signals for each IGBT, using the output signals of the zero current detecting unit and ON commands for the IGBTs of the other arms.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: January 13, 2004
    Assignee: Fuji Electric Co, Ltd.
    Inventor: Naotaka Matsuda
  • Publication number: 20020089321
    Abstract: A power semiconductor module that automatically sets an optimum dead time without being affected by the switching characteristics or driving mode of individual power semiconductor devices. The power semiconductor module includes a pair of IGBTs disposed in an upper and lower arm, respectively, and driving circuits for driving IGBTs. The power semiconductor module includes current detecting circuits and zero current detecting circuits for detecting that the output current of each of the IGBTs has become nearly zero, an inverting circuit, upper arm driving circuit and lower arm driving circuit for generating actual driving signals for each IGBT, using the output signals of the zero current detecting unit and ON commands for the IGBTs of the other arms.
    Type: Application
    Filed: December 31, 2001
    Publication date: July 11, 2002
    Inventor: Naotaka Matsuda