Patents by Inventor Naotaka Oiwa

Naotaka Oiwa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Laminated inductor array
    Patent number: 6480087
    Abstract: In a laminated inductor array, four spiral inductors are aligned from the left end surface to the right end surface of a laminated body. In the direction of alignment of the spiral inductors, the number of the coil conductors on the side portion of the left end surface of the inductor located close to the left end portion of the laminated body and the number of the coil conductors on the side portion of the right end surface of the inductor located close to the right end portion of the laminated body are the same.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: November 12, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Naotaka Oiwa, Hiroyuki Takeuchi, Motoi Nishii, Yoshihiro Nishinaga
  • Complex electronic component
    Patent number: 6462638
    Abstract: When a plurality of devices are disposed in parallel in a magnetic ceramic laminated member to form a complex electronic component, an insulating member is disposed between adjacent devices. When adjacent devices among a plurality of devices are disposed on different planes in a magnetic ceramic laminated member to form a complex electronic component, an insulating member is disposed at least at a part of an intermediate layer positioned between the adjacent devices in the lamination direction.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: October 8, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Katsuhisa Imada, Motoi Nishii, Hiroyuki Takeuchi, Naotaka Oiwa, Yoshihiro Nishinaga
  • Multi-layered inductor array
    Patent number: 6437677
    Abstract: A multi-layered inductor array is constructed to reduce and minimize variations in the inductance values and DC resistance values of a plurality of inductors contained in a multi-layered structure. In this multi-layered inductor array, four spiral inductors having an equal number of winding turns are aligned from the left end surface of the multi-layered structure to the right end surface thereof. In the direction in which the four spiral inductors are aligned, the lengths of the spiral portions of the inductors positioned at the central portion of the multi-layered structure are greater than those of the spiral portions of the spiral inductors positioned at both end portions thereof.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: August 20, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hiroyuki Takeuchi, Naotaka Oiwa, Motoi Nishii
  • Complex electronic component
    Publication number: 20010030593
    Abstract: When a plurality of devices are disposed in parallel in a magnetic ceramic laminated member to form a complex electronic component, an insulating member is disposed between adjacent devices. When adjacent devices among a plurality of devices are disposed on different planes in a magnetic ceramic laminated member to form a complex electronic component. an insulating member is disposed at least at a part of an intermediate layer positioned between the adjacent devices in the lamination direction.
    Type: Application
    Filed: June 20, 2001
    Publication date: October 18, 2001
    Inventors: Katsuhisa Imada, Motoi Nishii, Hiroyuki Takeuchi, Naotaka Oiwa, Yoshihiro Nishinaga
  • Complex electronic component having a plurality of devices formed side by side in a ceramic material
    Patent number: 6294976
    Abstract: When a plurality of devices are disposed in parallel in a magnetic ceramic laminated member to form a complex electronic component, an insulating member is disposed between adjacent devices. When adjacent devices among a plurality of devices are disposed on different planes in a magnetic ceramic laminated member to form a complex electronic component, an insulating member is disposed at least at a part of an intermediate layer positioned between the adjacent devices in the lamination direction.
    Type: Grant
    Filed: July 6, 1998
    Date of Patent: September 25, 2001
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Katsuhisa Imada, Motoi Nishii, Hiroyuki Takeuchi, Naotaka Oiwa, Yoshihiro Nishinaga