Abstract: A Doherty amplifier of an embodiment includes an input terminal, an output terminal a splitter, a combiner, a carrier amplifier, a peak amplifier. The splitter is connected to the input terminal, the splitter having first and second outputs. The combiner is connected to the output terminal, the combiner having first and second inputs. The carrier amplifier includes a first input-side two-port network connected to the first output of the splitter, a first amplifier connected to an output of the first input-side two-port network, and a first output-side two-port network connected between an output of the first amplifier and the first input of the combiner. The peak amplifier includes a second input-side two-port network connected to the second output of the splitter, a second amplifier connected to the output of the second input-side two-port network, and a second output-side two-port network connected between an output of the second amplifier and the second input of the combiner.

Abstract: A high frequency signal amplifying circuitry of an embodiment includes a first splitter, a first amplifier, a second amplifier, a loop oscillation suppressor, and a combiner. The first amplifier includes a second splitter, a first carrier amplifier, a first peak amplifier, and a first combiner. The second amplifier includes a third splitter, a second carrier amplifier, a second peak amplifier, and a second combiner. The second carrier amplifier being adjacent to an associated the first carrier amplifier or the second peak amplifier being adjacent to an associated the first peak amplifier. The loop oscillation suppressor located between the second carrier amplifier and the associated first carrier amplifier or the second peak amplifier and the associated first peak amplifier.

Abstract: A Doherty amplifier of an embodiment includes an input terminal, an output terminal a splitter, a combiner, a carrier amplifier, a peak amplifier. The splitter is connected to the input terminal, the splitter having first and second outputs. The combiner is connected to the output terminal, the combiner having first and second inputs. The carrier amplifier includes a first input-side two-port network connected to the first output of the splitter, a first amplifier connected to an output of the first input-side two-port network, and a first output-side two-port network connected between an output of the first amplifier and the first input of the combiner. The peak amplifier includes a second input-side two-port network connected to the second output of the splitter, a second amplifier connected to the output of the second input-side two-port network, and a second output-side two-port network connected between an output of the second amplifier and the second input of the combiner.

Abstract: A high frequency signal amplifying circuitry of an embodiment includes a first splitter, a first amplifier, a second amplifier, a loop oscillation suppressor, and a combiner. The first amplifier includes a second splitter, a first carrier amplifier, a first peak amplifier, and a first combiner. The second amplifier includes a third splitter, a second carrier amplifier, a second peak amplifier, and a second combiner. The second carrier amplifier being adjacent to an associated the first carrier amplifier or the second peak amplifier being adjacent to an associated the first peak amplifier. The loop oscillation suppressor located between the second carrier amplifier and the associated first carrier amplifier or the second peak amplifier and the associated first peak amplifier.

Abstract: A Doherty amplifier of an embodiment includes an input terminal, an output terminal a splitter, a combiner, a carrier amplifier, a peak amplifier. The splitter is connected to the input terminal, the splitter having first and second outputs. The combiner is connected to the output terminal, the combiner having first and second inputs. The carrier amplifier includes a first input-side two-port network connected to the first output of the splitter, a first amplifier connected to an output of the first input-side two-port network, and a first output-side two-port network connected between an output of the first amplifier and the first input of the combiner. The peak amplifier includes a second input-side two-port network connected to the second output of the splitter, a second amplifier connected to the output of the second input-side two-port network, and a second output-side two-port network connected between an output of the second amplifier and the second input of the combiner.

Abstract: A class-AB power amplifier according to the present embodiment includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being more than ?(rad) and less than 2·?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1, load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2, and load impedance of a 3rd harmonic being expressed as Z3=R3+j?X3 which are observed from a dependent current source of an equivalent circuit of the amplifying element, and a relationship between variables X1 and R1 is set to ?0.5·R1<=X1<=0.5·R1, variable R1 is set to R1=Vdc/Imax·{1?cos(?o/2)}·?/{?o/2?sin(?o)/2}, variable X2/X1 is set to X2/X1=?2·{?o?sin(?o)}/{sin(?o/2)?sin(1.5·?o)/3}, and variable X3/X1 is set to X3/X1={?o?sin(?o)}/{sin(?o)/3?sin(2·?o)/6}, or each of the variables is set thereto so as to become equal substantially.

Abstract: According to an embodiment, a class-AB power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being more than ?(rad) and less than 2·?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1 and load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2 which are observed from a dependent current source of an equivalent circuit of the amplifying element, wherein a relationship between variables X1 and R1 is set to ?R1<=X1<=R1, variable R1 is set to R1=Vdc/Imax·?·{1?cos(?o/2)}/{?o/2?sin(?o)/2}, and variable X2/X1 is set to X2/X1=?{?o/2?sin(?o)/2}/{sin(?o/2)?sin(1.5·?o)/3}, or each of the variables is set thereto so as to become equal substantially.

Abstract: According to one embodiment, a class-C power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being less than ?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1 and load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2 which are observed from a dependent current source of an equivalent circuit of the amplifying element, wherein a relationship between variables X1 and R1 is set to ?R1<=X1<=R1, variable R1 is set to R1=Vdc/Imax·?·{1?cos(?o/2)}/{?o/2?sin(?o)/2}, and variable X2/X1 is set to X2/X1=?{?o/2?sin(?o)/2}/{sin(?/2)?sin(1.5·?o)/3}, or each of the variables is set thereto so as to become equal substantially.

Abstract: A stabilization network and a semiconductor device having the stabilization network wherein the stabilization network includes an active element having a negative resistance accompanying a high frequency negative resistance oscillation; and a tank circuit composed of a resistance connected to a main electrode of the active element, an inductance and capacitance which are connected in parallel with the resistance and synchronize with an oscillating frequency of the high frequency negative resistance oscillation, wherein the stabilization network is performed for suppressing a negative resistance accompanying a Gunn oscillation and obtaining stable and highly efficient power amplification.

Abstract: A power amplification device configured to switching-amplify a high-frequency input signal and output a switching-amplified signal. The device includes a feedback circuit configured to output a feedback signal including a portion of the switching-amplified signal; a subtractor configured to output an error signal indicating a difference between the input signal and the feedback signal; a comparator configured to compare the error signal with a threshold voltage and generate an on/off pulse signal based on a result of the comparison; a one-shot circuit configured to be set in an on-state for a time period using a rising timing of the pulse signal as a trigger; and an amplifier configured to switching-amplify the input signal by a logical OR between the generated on/off pulse signal and an output signal from the one-shot circuit, and output the switching-amplified signal.

Abstract: According to one embodiment, a class-C power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being less than ?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1 and load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2 which are observed from a dependent current source of an equivalent circuit of the amplifying element, wherein a relationship between variables X1 and R1 is set to ?R1<=X1<=R1, variable R1 is set to R1=Vdc/Imax·?·{1?cos(?o/2)}/{?o/2?sin(?o)/2}, and variable X2/X1 is set to X2/X1=?{?o/2?sin(?o)/2}/{sin(?/2)?sin(1.5·?o)/3), or each of the variables is set thereto so as to become equal substantially.

Abstract: A class-AB power amplifier according to the present embodiment includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being more than ?(rad) and less than 2·?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1, load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2, and load impedance of a 3rd harmonic being expressed as Z3=R3+j?X3 which are observed from a dependent current source of an equivalent circuit of the amplifying element, and a relationship between variables X1 and R1 is set to ?0.5·R1<=X1<=0.5·R1, variable R1 is set to R1=Vdc/Imax·{1?cos(?o/2)}·?/{?o/2?sin(?o)/2}, variable X2/X1 is set to X2/X1=?2·{?o?sin(?o)}/{ sin(?o/2)?sin(1.5·?o)/3}, and variable X3/X1 is set to X3/X1={?o?sin(?o)}/{ sin(?o)/3?sin(2·?o)/6}, or each of the variables is set thereto so as to become equal substantially.

Abstract: According to an embodiment, a class-AB power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being more than ?(rad) and less than 2·?r(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1 and load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2 which are observed from a dependent current source of an equivalent circuit of the amplifying element, wherein a relationship between variables X1 and R1 is set to ?R1<=X1<=R1, variable R1 is set to R1=Vdc/Imax·?·{1?cos(?o/2)}/{?o/2?sin(?o)/2}, and variable X2/X1 is set to X2/X1=?{?o/2?sin(?o)/2}/{sin(?o/2)?sin(1.5·?o)/3}, or each of the variables is set thereto so as to become equal substantially.

Abstract: A semiconductor device, which can prevent an element breakdown by alleviating of electric field concentrations, and can also prevent reduction of gain, includes: a source electrode formed on a semiconductor layer; a drain electrode formed on the semiconductor layer; a gate electrode formed between the source electrode and the drain electrode; an insulating film formed on the semiconductor layer and the gate electrode; a field plate electrode formed on the insulating film; and a resistor for connecting the field plate electrode and the source electrode.

Abstract: According to one embodiment, there is a semiconductor device including a first active element, a second active element connected in parallel with the first active element, and a first stabilization circuit connected between a gate of the first active element and a gate of the second active element and configured with a parallel circuit of a gate bypass resistor, a gate bypass capacitor, and a gate bypass inductor, the first stabilization circuit having a resonant frequency equal to an odd mode resonant frequency.

Abstract: According to one embodiment, there is a semiconductor device including a first active element, a second active element connected in parallel with the first active element, and a first stabilization circuit connected between a gate of the first active element and a gate of the second active element and configured with a parallel circuit of a gate bypass resistor, a gate bypass capacitor, and a gate bypass inductor, the first stabilization circuit having a resonant frequency equal to an odd mode resonant frequency.

Abstract: According to one embodiment, there is a semiconductor device including a first active element, a second active element connected in parallel with the first active element, and a first stabilization circuit connected between a gate of the first active element and a gate of the second active element and configured with a parallel circuit of a gate bypass resistor, a gate bypass capacitor, and a gate bypass inductor, the first stabilization circuit having a resonant frequency equal to an odd mode resonant frequency.

Abstract: According to one embodiment, a power amplification device configured to switching-amplify a high-frequency input signal into an output signal includes a feedback circuit, a subtractor, a comparator, an output tuning circuit, a constant voltage controlled power supply, and an amplifier. The feedback circuit is configured to output a portion of the output signal as a feedback signal. The subtractor is configured to output a difference between the input signal and the feedback signal as a error signal. The comparator is configured to generate an on/off pulse signal by comparing the error signal with a predetermined threshold voltage. The output tuning circuit is configured to resonate to a frequency of the input signal. The amplifier is configured to generate the output signal by switching-amplifying the input signal according to on/off of pulse signal, and output the output signal to the output tuning circuit.

Abstract: According to one embodiment, there is a semiconductor device including a first active element, a second active element connected in parallel with the first active element, and a first stabilization circuit connected between a gate of the first active element and a gate of the second active element and configured with a parallel circuit of a gate bypass resistor, a gate bypass capacitor, and a gate bypass inductor, the first stabilization circuit having a resonant frequency equal to an odd mode resonant frequency.

Abstract: A stabilization network and a semiconductor device having the stabilization network wherein the stabilization network includes an active element having a negative resistance accompanying a high frequency negative resistance oscillation; and a tank circuit composed of a resistance connected to a main electrode of the active element, an inductance and capacitance which are connected in parallel with the resistance and synchronize with an oscillating frequency of the high frequency negative resistance oscillation, wherein the stabilization network is performed for suppressing a negative resistance accompanying a Gunn oscillation and obtaining stable and highly efficient power amplification.