Patents by Inventor Naoto Inokawa

Naoto Inokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7961821
    Abstract: A D.C. offset canceling and gain adjusting techniques permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a radio communication system are provided. A communication semiconductor integrated circuit has a plurality of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level. Offset cancellation values are generated by detecting D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers when starting reception and altering the gain. Gain setting in a high gain amplifying section is accomplished using rough and precise settings.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: June 14, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Toshihito Habuka, Naoto Inokawa, Kiyoharu Ozaki, Tatsuji Matsuura, Koichi Yahagi
  • Publication number: 20090080577
    Abstract: A D.C. offset canceling and gain adjusting techniques permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a radio communication system are provided. A communication semiconductor integrated circuit has a plurality of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level. Offset cancellation values are generated by detecting D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers when starting reception and altering the gain. Gain setting in a high gain amplifying section is accomplished using rough and precise settings.
    Type: Application
    Filed: November 24, 2008
    Publication date: March 26, 2009
    Inventors: Toshihito HABUKA, Naoto INOKAWA, Kiyoharu OZAKI, Tatsuji MATSUURA, Koichi YAHAGI
  • Patent number: 7471748
    Abstract: A D.C. offset canceling technique and a gain adjusting technique permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a relatively short period of time in a radio communication system, such as a wireless LAN, are to be provided. A communication semiconductor integrated circuit (high frequency IC) has a plurality each of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level while eliminating unnecessary waves. Offset cancellation values are generated by detecting in advance D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers at the time of starting reception and altering the gain.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: December 30, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Toshihito Habuka, Naoto Inokawa, Kiyoharu Ozaki, Tatsuji Matsuura, Koichi Yahagi
  • Patent number: 7313125
    Abstract: The invention comprises: processing for receiving an OFDM packet having a preamble and the following data transmission symbol, in which packet the subcarrier interval of the preamble is set wider than that of the data transmission symbol; processing for estimating a DC offset occurring at a receiving side by using the received preamble; processing for correcting the DC offset on the received data transmission symbol, according to the estimation result of the DC offset; and processing for demodulating the DC offset corrected data transmission symbol. Thus, it is possible to estimate a DC offset and then correct the DC offset according to the estimated value, in the OFDM packet with no nul symbol defined there.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: December 25, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Toyokazu Hori, Hiroshi Nogami, Toshihito Habuka, Naoto Inokawa, Kazuyuki Takada
  • Patent number: 7263145
    Abstract: A wireless LAN system has auto gain control with no work load applied to its baseband processing block. When the wireless LAN system gets ready to receive a signal, the gain control circuit switches between the receiving antennas. The gain control circuit sets gain setting value time divisional data according to the level of a received signal to roughly control the gain to be set in the LAN and the gain to be set in two programmable gain amplifiers.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: August 28, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Toshihito Habuka, Masaki Noda, Hiroshi Nogami, Toyokazu Hori, Tatsuji Matsuura, Kazuaki Hori, Naoto Inokawa
  • Publication number: 20050159148
    Abstract: In a radio communication system having a plurality of antennas, a reception-system circuit including variable gain amplification circuits for amplifying a signal received from either of the antennas and a frequency conversion circuit for down-converting the received signal to a signal of a lower frequency, and a signal measuring circuit for detecting intensity of the received signal, whereby a signal received by either of the antennas is selected in accordance with a reception state and amplified and demodulated, change rates with time of a signal which is formed by the signal measuring circuit are determined in respect of either of the signals received by the plurality of antennas and a control signal for selecting a reception antenna is generated in accordance with a differences between the change rates.
    Type: Application
    Filed: January 12, 2005
    Publication date: July 21, 2005
    Inventors: Toshihito Habuka, Naoto Inokawa, Tatsuji Matsuura, Toyokazu Hori, Hiroshi Nogami
  • Publication number: 20040264432
    Abstract: The invention comprises: processing for receiving an OFDM packet having a preamble and the following data transmission symbol, in which packet the subcarrier interval of the preamble is set wider than that of the data transmission symbol; processing for estimating a DC offset occurring at a receiving side by using the received preamble; processing for correcting the DC offset on the received data transmission symbol, according to the estimation result of the DC offset; and processing for demodulating the DC offset corrected data transmission symbol. Thus, it is possible to estimate a DC offset and then correct the DC offset according to the estimated value, in the OFDM packet with no nul symbol defined there.
    Type: Application
    Filed: March 26, 2004
    Publication date: December 30, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Toyokazu Hori, Hiroshi Nogami, Toshihito Habuka, Naoto Inokawa, Kazuyuki Takada
  • Publication number: 20040264608
    Abstract: A D.C. offset canceling technique and a gain adjusting technique permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a relatively short period of time in a radio communication system, such as a wireless LAN, are to be provided. A communication semiconductor integrated circuit (high frequency IC) has a plurality each of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level while eliminating unnecessary waves. Offset cancellation values are generated by detecting in advance D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers at the time of starting reception and altering the gain.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 30, 2004
    Inventors: Toshihito Habuka, Naoto Inokawa, Kiyoharu Ozaki, Tatsuji Matsuura, Koichi Yahagi
  • Publication number: 20040022004
    Abstract: Disclosed here is a wireless LAN system employed for quick and accurate auto gain controlling with no work load to be applied to its baseband processing block. When the wireless LAN system gets ready to receive a signal, the gain control circuit switches between the receiving antennas alternately. The gain control circuit, when receiving a signal over a predetermined receiving sensitivity, sets gain setting value time divisional data according to the level of the received signal measured by the first measurement circuit to roughly control the gain to be set in the LNA and the gain to be set in the two programmable gain amplifiers provided in the front steps of the LPF/PGA circuits. The gain control circuit then cancels the DC offset while the second measurement circuit measures the signal level.
    Type: Application
    Filed: July 14, 2003
    Publication date: February 5, 2004
    Inventors: Toshihito Habuka, Masaki Noda, Hiroshi Nogami, Toyokazu Hori, Tatsuji Matsuura, Kazuaki Hori, Naoto Inokawa