Patents by Inventor Naoto Inoue

Naoto Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140056558
    Abstract: An optical fiber has an incident end on which light is incident, an emitting end from which the light is emitted, and an aperture provided in a core located at or near the emitting end. The aperture is formed by irradiating the core with an ultrashort pulsed laser beam having pulse widths of 10?15 seconds to 10?11 seconds.
    Type: Application
    Filed: March 22, 2011
    Publication date: February 27, 2014
    Applicant: OMRON CORPORATION
    Inventors: Satoshi Hirono, Naoto Inoue, Manabu Ikoma, Kiyohiko Gondo, Tsuyoshi Miyata, Kazunari Komai
  • Publication number: 20140042478
    Abstract: An optical semiconductor package has a base material that includes a principal surface, an optical semiconductor element that is located on the principal surface of the base material to project or receive light, and an optical transparency sealing layer that seals the optical semiconductor element while covering the principal surface of the base material. An air gap having a shape surrounding an optical axis of the optical semiconductor element is provided in the optical transparency sealing layer such that the light is reflected by an interface of a portion corresponding to an inner circumferential surface of the air gap in an interface formed by the air gap and the optical transparency sealing layer.
    Type: Application
    Filed: March 22, 2011
    Publication date: February 13, 2014
    Applicant: OMRON CORPORATION
    Inventors: Satoshi Hirono, Manabu Ikoma, Naoto Inoue, Tsuyoshi Miyata, Kazunari Komai
  • Publication number: 20130070004
    Abstract: Disclosed is a liquid crystal display device wherein display performance of a two-dimensional image and that of a three-dimensional image are both improved. The liquid crystal display device is provided with: a liquid crystal display panel, which displays the two-dimensional image and the three-dimensional image by selectively switching the images; and a backlight, which supplies light to the liquid crystal display panel. The backlight includes an illuminating region, which is scan-lighted corresponding to scanning of the liquid crystal display panel, and the scanning frequencies of the illuminating region at the time of displaying the two-dimensional image and the three-dimensional image on the liquid crystal display panel are different from each other.
    Type: Application
    Filed: January 25, 2011
    Publication date: March 21, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Naoto Inoue, Akira Tomiyoshi, Masayuki Takahashi, Osamu Teranuma
  • Publication number: 20130027288
    Abstract: Disclosed are a direct-lit LED backlight, and a liquid crystal display device, provided with the backlight. In the LED backlight, heat generated by LEDs is easily dissipated, the number of the LEDs disposed is reduced, the temperature of the LEDs does not become too high, and reliability is improved by stabilizing light emission luminance and service life. The LED backlight (BL1) is provided with: an LED substrate (2), on which a plurality of the LEDs (1) are arranged in a row in the axis line direction; and a base (3), which has a substrate attaching surface (3a) for attaching the LED substrate. The base (3) is attached to a frame (10) such that the axis line direction is in the perpendicular direction, and a flow channel where air flows is provided in the perpendicular direction on the rear side of the substrate attaching surface (3a) of the base (3).
    Type: Application
    Filed: February 4, 2011
    Publication date: January 31, 2013
    Inventors: Naoto Inoue, Akira Tomiyoshi, Tomohiko Yamamoto
  • Publication number: 20120175650
    Abstract: An illuminating device (4) includes a light emitting diode substrate (8). A connector (20) is provided at a predetermined position on one end in the longitudinal direction of the light emitting diode substrate (8). Two light emitting diode substrates (8) are adjacent in an arrangement direction, and a plurality of light emitting diodes (18r), (18g), and (18b) included in light emitting diode units (19a) to (19h) in each of the two light emitting diode substrates (8) are provided so as to be symmetrical with respect to a point that is in the center of these two light emitting diode substrates (8).
    Type: Application
    Filed: May 11, 2010
    Publication date: July 12, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Akira Tomiyoshi, Naoto Inoue, Takeshi Masuda, Yuhsaku Ajichi
  • Publication number: 20120127668
    Abstract: A power module can prevent damages due to cracking or breakage of an insulating substrate when molding even if a heat plate constituting a power module pre-product is made areally smaller than the insulating substrate, and can also sufficiently satisfy demand for minimization. Specifically, the power module pre-product is sealed by a molding resin layer in a state where externally exposed end portion on one end side in both external connecting terminals and the other surface side of a heat plate are each exposed to the outside. The power module substrate constituting a multilayer substrate body includes an aligning hole, into which an aligning pin is inserted, the pin being included in a lower molding die constituting a molding die with an upper molding die that molds a molding resin layer, so as to position the power module pre-product inside a cavity.
    Type: Application
    Filed: June 22, 2010
    Publication date: May 24, 2012
    Applicant: OMRON CORPORATION
    Inventors: Shingo Yamamoto, Akio Sumiya, Yasuo Matsuda, Naoto Inoue, Makoto Tami, Ryo Sugihara, Fumiaki Tanaka, Shintaro Hara, Shota Akinaga
  • Publication number: 20120120656
    Abstract: An illumination device (10) comprises: a plurality of substrates (3) each of which has one surface on which a plurality of light sources (5) are provided; a plurality of first reflecting sheets (7), which cover the one surfaces of the respective plurality of substrates (3) so as to leave the plurality of light sources (5) uncovered; a supporting plate (1) which supports the plurality of substrates (3); and a second reflecting sheet (8) which covers an upper surface of the supporting plate (1) in a gap between respective adjacent ones of the plurality of substrate (3). This makes it possible to provide an illumination device capable of irradiating light without luminance non-uniformity.
    Type: Application
    Filed: May 12, 2010
    Publication date: May 17, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yuhsaku Ajichi, Takeshi Masuda, Akira Tomiyoshi, Naoto Inoue
  • Publication number: 20120098462
    Abstract: An LED driver circuit which provides a cost reduction is provided by employing a circuit configuration which allows a size reduction. In at least one example embodiment, the LED driver circuit includes a first switching element, a second switching element, a sense resistor, a sensing unit, a calculator, and a driver. The plurality of LEDs, the first switching element, the second switching element, and the sense resistor are coupled to each other in series in this order. The sensing unit receives a voltage at a node between the second switching element and the sense resistor, and generates voltage data representing the voltage. The calculator calculates a temporal average of a current flowing through the LEDs based on the voltage data, and generates current data corresponding to the temporal average. The driver drives the first switching element and the second switching element based on the current data.
    Type: Application
    Filed: April 14, 2010
    Publication date: April 26, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Naoto Inoue, Akira Tomiyoshi, Takeshi Masuda, Yuhsaku Ajichi
  • Patent number: 8111371
    Abstract: An illumination device includes an LED package, an LED driver including an FET, and a thermistor disposed on a substrate. A plurality of such LED packages are disposed on the substrate such that a first area and a second area, each determined by vertices corresponding to LED packages, are defined on the substrate. The thermistor is disposed in the first area, and the FET is disposed in the second area, which is outside of the first area. The thermistor detects a temperature in the first area. Such a configuration allows the thermistor to detect, in accordance with the temperature in the area, the temperature of heat transferred from the LED packages, without being affected by heat generated by the FET. This makes it possible to efficiently make temperature corrections to stabilize color temperature and luminance.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: February 7, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shinji Suminoe, Tomohiko Yamamoto, Akira Tomiyoshi, Naoto Inoue
  • Publication number: 20110254454
    Abstract: A first power supply voltage Vin1 of a first input section and a second power supply voltage Vin2 of the second input section satisfy an expression Vf(min)?Vin2<Vf(typ)<Vin1?Vf(max). A switching controller alternately electrically connects the first input section or the second input section to LEDs, and based on the difference between an average forward current detected by a detector and a target value of the average forward current, controls the ratio of a period of time for which the first input section is connected to the LEDs to a period of time for which the second input section is connected to the LEDs so that the value of the average forward current approaches the target value.
    Type: Application
    Filed: February 18, 2010
    Publication date: October 20, 2011
    Applicant: Sharp Kabushiki Kaisha 22-22, Nagaike-cho, Abeno-ku
    Inventors: Naoto Inoue, Akira Tomiyoshi
  • Publication number: 20100271565
    Abstract: An illumination device includes an LED package, an LED driver including an FET, and a thermistor disposed on a substrate. A plurality of such LED packages are disposed on the substrate such that a first area and a second area, each determined by vertices corresponding to LED packages, are defined on the substrate. The thermistor is disposed in the first area, and the FET is disposed in the second area, which is outside of the first area. The thermistor detects a temperature in the first area. Such a configuration allows the thermistor to detect, in accordance with the temperature in the area, the temperature of heat transferred from the LED packages, without being affected by heat generated by the FET. This makes it possible to efficiently make temperature corrections to stabilize color temperature and luminance.
    Type: Application
    Filed: July 2, 2008
    Publication date: October 28, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Shinji Suminoe, Tomohiko Yamamoto, Akira Tomiyoshi, Naoto Inoue
  • Patent number: 7719515
    Abstract: The invention concerns an input device including an input receiving panel and a stylus enabling an input, the input device sensing an input by means of capacitive coupling between a panel electrode on the input receiving panel and a stylus electrode on the stylus, and includes: a signal supply section supplying an input sensing signal to the panel electrode; a signal detecting circuit detecting a signal generated in the stylus electrode; and an input sensing section comparing the input sensing signal with the detection signal detected by the signal detecting circuit and sensing an input based on a result of the comparison. An input-sensing digital code is superimposed on the input sensing signal. This allows for further reduction in the possibility of false sensing caused by noise than conventional techniques.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: May 18, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Koji Fujiwara, Naoto Inoue, Tomohiko Yamamoto, Keiichi Tanaka, Hideki Ichioka
  • Publication number: 20100053149
    Abstract: A display apparatus includes a content detector configured to, on the basis of meta data of content data being reproduced, detect associated content data associated with the content data being reproduced; and a display controller configured to cause a reproduction image contained in the content data being reproduced to be displayed on a display screen and cause associated images contained in the associated content data detected by the content detector to be displayed as a moving image on the display screen. The display controller causes associated images of different associated content data that is sequentially detected by the content detector to be sequentially displayed on the display screen in accordance with the change of the meta data of the content data being reproduced.
    Type: Application
    Filed: August 25, 2009
    Publication date: March 4, 2010
    Applicant: Sony Corporation
    Inventors: Naoto Inoue, Kazunori Ohmura
  • Publication number: 20100058236
    Abstract: An information processing apparatus has a content detecting unit which detects a piece of content data having a piece of time information representing a time point that is a predetermined cycle before or after with respect to a time point represented by a piece of time information added to a piece of content data being reproduced, and a display control unit which displays, on a display screen, at least one of a piece of attribute information added to the piece of content data detected by the content detecting unit and an image included in the piece of content data as well as at least one of a piece of attribute information added to the piece of content data being reproduced and an image included in the piece of content data being reproduced.
    Type: Application
    Filed: August 24, 2009
    Publication date: March 4, 2010
    Applicant: Sony Corporation
    Inventors: Naoto Inoue, Kazunori Ohmura
  • Patent number: 7667280
    Abstract: Provided is a semiconductor device having a trench isolation structure and a high power supply voltage circuit section including at least a well region and a MOS transistor formed therein. The high power supply voltage circuit section includes a carrier capture region for preventing latch-up in a vicinity of an end portion of the well region, and a depth of the carrier capture region is larger than a depth of the trench isolation region. The carrier capture region in the high power supply voltage circuit section is formed of a diffusion layer which is the same as that of a source or a drain region of the MOS transistor formed in the high power supply voltage circuit section.
    Type: Grant
    Filed: February 13, 2008
    Date of Patent: February 23, 2010
    Assignee: Seiko Instruments Inc.
    Inventors: Hiroaki Takasu, Naoto Inoue, Sukehiro Yamamoto
  • Patent number: 7570252
    Abstract: When a display panel is in contact with the pen tip of an input pen, an infrared receiver and at least two ultrasonic receivers, provided on the display panel, receive respectively an infrared signal and an ultrasonic signal simultaneously transmitted from an infrared transmitter and an ultrasonic transmitter, and computes the contact position of the pen tip on the display panel from a result, containing a time delay, of the ultrasonic receiver receiving the ultrasonic signal with reference to a time when infrared signal is received. The input pen includes a piezoelectric element sensing pen pressure when the pen tip is in contact with the display panel and a microcomputer controlling a infrared transmitter to transmit an infrared signal which changes in accordance with the pen pressure.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: August 4, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Koji Fujiwara, Naoto Inoue, Yasunori Ake
  • Publication number: 20080191308
    Abstract: Provided is a semiconductor device having a trench isolation structure and a high power supply voltage circuit section including at least a well region and a MOS transistor formed therein. The high power supply voltage circuit section includes a carrier capture region for preventing latch-up in a vicinity of an end portion of the well region, and a depth of the carrier capture region is larger than a depth of the trench isolation region. The carrier capture region in the high power supply voltage circuit section is formed of a diffusion layer which is the same as that of a source or a drain region of the MOS transistor formed in the high power supply voltage circuit section.
    Type: Application
    Filed: February 13, 2008
    Publication date: August 14, 2008
    Applicant: Seiko Instruments Inc.
    Inventors: Hiroaki Takasu, Naoto Inoue, Sukehiro Yamamoto
  • Patent number: 7259071
    Abstract: A method for making a semiconductor device having a first active region and a second active region includes providing first and second isolation structures defining the first active region on a substrate. The first active region uses a first operational voltage, and the second active region uses a second operational voltage that is different from the first voltage. A nitride layer overlying the first and second active regions is formed. An oxide layer overlying the nitride layer is formed. A first portion of the oxide layer overlying the first active region is removed to expose a first portion of the nitride layer. The exposed first portion of the nitride layer is removed using a wet etch method while leaving a second portion of the nitride layer that is overlying the second active region intact.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: August 21, 2007
    Assignee: SilTerra Malaysia Sdn.Bhd.
    Inventors: Inki Kim, Sang Yeon Kim, Min Paek, Chiew Sin Ping, Wan Gie Lee, Choong Shiau Chien, Zadig Lam, Hitomi Watanabe, Naoto Inoue
  • Patent number: 7241665
    Abstract: A method for forming an isolation structure on a semiconductor substrate includes opening a portion of a pad oxide layer overlying the substrate using a process gas including an etchant gas and a polymer-forming gas. A portion of the substrate exposed by the opening step is etched to form a trench having a first slope and a second slope. The first slope is greater than 45 degrees, and the second slope is less than 45 degrees. The trench is filled to form the isolation structure.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: July 10, 2007
    Assignee: SilTerra Malaysia Sdn. Bhd.
    Inventors: Inki Kim, Sang Yeon Kim, Min Paek, Ch'ng Toh Ghee, Ramakrishnan Rajagopal, Chiew Sin Ping, Wan Gie Lee, Choong Shiau Chien, Charlie Tay, Chang Gi Lee, Hitomi Watanabe, Naoto Inoue
  • Patent number: 7205984
    Abstract: A pen input unit includes ultrasonic receivers that receive an ultrasonic signal transmitted from an ultrasonic transmitter of an input pen. Based on the received signal, the distance (distance value) of the ultrasonic transmitter from each of the ultrasonic receivers is determined. The distance value is used for the display control of the display panel, and is supplied to a reception sensitivity control section. The reception sensitivity control section carries out reception sensitivity control for reducing a difference in level of the respective waveforms received by the ultrasonic receivers. As a result, a pen input display device of an ultrasonic pen input system is provided that prevents errors over the entire input area of the display panel without increasing power consumption or impairing operability of pen entry.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: April 17, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Koji Fujiwara, Naoto Inoue