Patents by Inventor Naoto Oka

Naoto Oka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11798714
    Abstract: Resistive elements are formed in belt shape in regions sandwiched between secondary division prediction lines set onto a large substrate and extending in a direction orthogonal to primary division prediction lines, a plurality of front electrodes disposed facing each other at predetermined intervals on the resistive elements are formed so as to be across the primary division prediction lines, a glass coat layer covering each of the resistive elements and extending in the direction orthogonal to the secondary division prediction lines is formed, a resin coat layer covering an entire surface of the large substrate from a top of the glass coat layer is formed, and after that, the large substrate is diced along the primary division prediction lines and the secondary division prediction lines to obtain individual chip base bodies.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: October 24, 2023
    Assignee: KOA CORPORATION
    Inventor: Naoto Oka
  • Publication number: 20230307653
    Abstract: The present disclosure pertains to a carbon nanotube dispersion that contains carbon nanotubes, a dispersing agent, and a solvent, and that satisfies (1)-(4). (1) The ratio of G/D of the carbon nanotubes being 5-100. (2) Not less than 30 parts by mass but less than 250 parts by mass of the dispersing agent being contained with respect to 100 parts by mass of the carbon nanotubes. (3) The complex elastic modulus and the phase angle of the carbon nanotube dispersion at 25° C. and at a frequency of 1 Hz being, not less than 5 Pa but less than 650 Pa, and being not less than 5° but less than 50°, respectively. (4) The BET specific surface area of the carbon nanotubes being 550-1200 m2/g.
    Type: Application
    Filed: October 7, 2021
    Publication date: September 28, 2023
    Applicants: TOYO INK SC HOLDINGS CO., LTD., TOYOCOLOR CO., LTD.
    Inventors: Yu MORITA, Naoto OKA, Tetsuro IZUMIYA, Tomoaki MASUOKA
  • Patent number: 11657932
    Abstract: A chip resistor including: a rectangular parallelepiped insulating substrate; a strip-shaped resistor; a pair of front electrodes formed on a front surface of the resistor at both ends in the longitudinal direction; an insulating protective layer; and a pair of end face electrodes formed at both ends of the insulating substrate in the longitudinal direction, each of which is connected to each end face of the resistor, corresponding one of the front electrodes, and protective film; and a pair of external electrodes, wherein a cross-sectional shape of each of the front electrodes is almost a triangle in which a side of the end face has a maximum height, and a shape of an end face of each of the end face electrodes is almost a square.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: May 23, 2023
    Assignee: KOA CORPORATION
    Inventor: Naoto Oka
  • Publication number: 20220399140
    Abstract: A chip resistor including: a rectangular parallelepiped insulating substrate; a strip-shaped resistor; a pair of front electrodes formed on a front surface of the resistor at both ends in the longitudinal direction; an insulating protective layer; and a pair of end face electrodes formed at both ends of the insulating substrate in the longitudinal direction, each of which is connected to each end face of the resistor, corresponding one of the front electrodes, and protective film; and a pair of external electrodes, wherein a cross-sectional shape of each of the front electrodes is almost a triangle in which a side of the end face has a maximum height, and a shape of an end face of each of the end face electrodes is almost a square.
    Type: Application
    Filed: May 24, 2022
    Publication date: December 15, 2022
    Applicant: KOA CORPORATION
    Inventor: Naoto OKA
  • Publication number: 20220399143
    Abstract: Resistive elements are formed in belt shape in regions sandwiched between secondary division prediction lines set onto a large substrate and extending in a direction orthogonal to primary division prediction lines, a plurality of front electrodes disposed facing each other at predetermined intervals on the resistive elements are formed so as to be across the primary division prediction lines, a glass coat layer covering each of the resistive elements and extending in the direction orthogonal to the secondary division prediction lines is formed, a resin coat layer covering an entire surface of the large substrate from a top of the glass coat layer is formed, and after that, the large substrate is diced along the primary division prediction lines and the secondary division prediction lines to obtain individual chip base bodies.
    Type: Application
    Filed: May 31, 2022
    Publication date: December 15, 2022
    Applicant: KOA CORPORATION
    Inventor: Naoto OKA
  • Patent number: 11337301
    Abstract: A printed circuit board includes a line formation layer including a differential line having a first conductor and a second conductor, a first component for a countermeasure against a surge, a first connection conductor having one end connected to the first conductor and another end connected to the first component, a second component for a countermeasure against a surge, a second connection conductor having one end connected to the second conductor and another end connected to the second component, a ground layer, and a dielectric mounted between the line formation layer and the ground layer. Lengths of the first conductor and second conductor are adjusted based on a difference of capacitance values in the circuit board.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: May 17, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Ayumi Sakai, Fujiyuki Nakamoto, Yuichi Sasaki, Naoto Oka, Hideyuki Ohashi
  • Publication number: 20210337658
    Abstract: A first capacitance C1 exists between a first connection conductor (21) as well as a first component (31) and a ground layer (3), and a second capacitance C2 exists between a second connection conductor (22) as well as a second component (32) and the ground layer (3). The length of the first conductor (11) and the length of the second conductor (12) are each adjusted depending on a difference ?C between the first capacitance C1 and the second capacitance C2.
    Type: Application
    Filed: June 2, 2017
    Publication date: October 28, 2021
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Ayumi SAKAI, Fujiyuki NAKAMOTO, Yuichi SASAKI, Naoto OKA, Hideyuki OHASHI
  • Publication number: 20190372542
    Abstract: A sub wiring pattern (21) branches from a first branching portion (20a) of a main wiring pattern (20), and connects to the main wiring pattern (20) at a second branching portion (20b). In a portion of the main wiring pattern (20) from the first branching portion (20a) to the second branching portion (20b), a resistor element (12) and a three-terminal capacitor element (13) are serially connected. The sub wiring pattern (21) is formed so that its path length is larger than a length of a path from the first branching portion (20a) to the second branching portion (20b) in the main wiring pattern (20).
    Type: Application
    Filed: February 6, 2017
    Publication date: December 5, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Akihito KOBAYASHI, Naoto OKA, Hideyuki OHASHI, Yasuhiro SEKIMOTO
  • Patent number: 10446304
    Abstract: The invention is to provide a resistor trimming method capable of adjusting a resistance value with ultrahigh precision and having excellent production efficiency. To achieve the object, a start point (S1) at a distance from a resistor (4) is irradiated with laser light while probes are brought into contact with a pair of surface electrodes (3) to measure a resistance value of the resistor (4). The place irradiated with the laser light is scanned so that a first trimming groove (5) extending in a direction perpendicular to a current direction can be formed in the resistor (4). Then, the place irradiated with the laser light is returned by a predetermined amount from an end point (first turning point (T1)) of the first trimming groove (5) to be set as a second turning point (T2). With the second turning point (T2) as a start point, scanning and cutting is performed to forma second trimming groove (6). Thus, the resistance value of the resistor (4) is adjusted to a target resistance value with high precision.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: October 15, 2019
    Assignee: KOA Corporation
    Inventors: Naoto Oka, Homare Sasaki
  • Publication number: 20170301439
    Abstract: The invention is to provide a resistor trimming method capable of adjusting a resistance value with ultrahigh precision and having excellent production efficiency. To achieve the object, a start point (S1) at a distance from a resistor (4) is irradiated with laser light while probes are brought into contact with a pair of surface electrodes (3) to measure a resistance value of the resistor (4). The place irradiated with the laser light is scanned so that a first trimming groove (5) extending in a direction perpendicular to a current direction can be formed in the resistor (4). Then, the place irradiated with the laser light is returned by a predetermined amount from an end point (first turning point (T1)) of the first trimming groove (5) to be set as a second turning point (T2). With the second turning point (T2) as a start point, scanning and cutting is performed to forma second trimming groove (6). Thus, the resistance value of the resistor (4) is adjusted to a target resistance value with high precision.
    Type: Application
    Filed: July 22, 2015
    Publication date: October 19, 2017
    Applicant: KOA Corporation
    Inventors: Naoto OKA, Homare SASAKI
  • Patent number: 9674712
    Abstract: A radio communication method includes the steps of: storing a beam having a good characteristic and a beam having a bad characteristic on the basis of a result of beamforming setting; reserving a calibration period; changing a beam to the beam having the bad characteristic in the reserved calibration period; performing calibration in the reserved calibration period; and changing the beam having the bad characteristic to the beam having the good characteristic after the reserved calibration period has elapsed.
    Type: Grant
    Filed: February 12, 2015
    Date of Patent: June 6, 2017
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Takahashi, Masataka Irie, Naoto Oka, Yoshio Urabe, Takenori Sakamoto, Kazuhiro Ando
  • Patent number: 9270444
    Abstract: In a signal detection apparatus, power detection section 101 detects power of an inputted received signal, and upon detection of power exceeding a power detection threshold, outputs a trigger to storage section 102. Storage section 102 stores a first received signal upon reception of the trigger and outputs the stored first received signal to multiplier 103 and newly stores a second received signal upon receipt of the next trigger. Multiplier 103 multiplies the second received signal by the first received signal, integrator 104 integrates the multiplication result from multiplier 103 during a predetermined duration to obtain a correlation value of the second and first received signals, and absolute value calculation section 105 calculates an absolute value of the correlation value from integrator 104. Determination section 106 determines the presence/absence of a detection-target signal based on the absolute value of the correlation value from absolute value calculation section 105.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: February 23, 2016
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Takahashi, Yoshio Urabe, Kazuhiro Ando, Naoto Oka, Masataka Irie
  • Publication number: 20150245225
    Abstract: A radio communication method includes the steps of: storing a beam having a good characteristic and a beam having a bad characteristic on the basis of a result of beamforming setting; reserving a calibration period; changing a beam to the beam having the bad characteristic in the reserved calibration period; performing calibration in the reserved calibration period; and changing the beam having the bad characteristic to the beam having the good characteristic after the reserved calibration period has elapsed.
    Type: Application
    Filed: February 12, 2015
    Publication date: August 27, 2015
    Inventors: HIROSHI TAKAHASHI, MASATAKA IRIE, NAOTO OKA, YOSHIO URABE, TAKENORI SAKAMOTO, KAZUHIRO ANDO
  • Patent number: 8758059
    Abstract: A cable coupler including an external cylinder mechanism having an inner conductor for electrically connecting the inner conductor itself to the outer conductors of the shielded cables, an outer conductor having a larger diameter than the inner conductor, a gap portion disposed between the inner conductor and the outer conductor, and capacitors arranged in the gap portion, for electrically connecting between the outer conductor and the inner conductor, an inner portion of the external cylinder mechanism being able to be opened and closed along a longitudinal direction, an internal coupling mechanism placed inside the inner conductor and having connecting pins for holding the core wires of the shielded cables, for electrically connecting between the core wires of the shielded cables, and a base for holding the external cylinder mechanism and for electrically connecting the external cylinder mechanism to an external conductor.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: June 24, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yosuke Watanabe, Yuichi Sasaki, Chiharu Miyazaki, Naoto Oka, Koichiro Misu
  • Publication number: 20140056394
    Abstract: In a signal detection apparatus, power detection section 101 detects power of an inputted received signal, and upon detection of power exceeding a power detection threshold, outputs a trigger to storage section 102. Storage section 102 stores a first received signal upon reception of the trigger and outputs the stored first received signal to multiplier 103 and newly stores a second received signal upon receipt of the next trigger. Multiplier 103 multiplies the second received signal by the first received signal, integrator 104 integrates the multiplication result from multiplier 103 during a predetermined duration to obtain a correlation value of the second and first received signals, and absolute value calculation section 105 calculates an absolute value of the correlation value from integrator 104. Determination section 106 determines the presence/absence of a detection-target signal based on the absolute value of the correlation value from absolute value calculation section 105.
    Type: Application
    Filed: March 12, 2013
    Publication date: February 27, 2014
    Applicant: Panasonic Corporation
    Inventors: Hiroshi Takahashi, Yoshio Urabe, Kazuhiro Ando, Naoto Oka, Masataka Irie
  • Publication number: 20120309230
    Abstract: A cable coupler including an external cylinder mechanism having an inner conductor for electrically connecting the inner conductor itself to the outer conductors of the shielded cables, an outer conductor having a larger diameter than the inner conductor, a gap portion disposed between the inner conductor and the outer conductor, and capacitors arranged in the gap portion, for electrically connecting between the outer conductor and the inner conductor, an inner potion of the external cylinder mechanism being able to be opened and closed along a longitudinal direction, an internal coupling mechanism placed inside the inner conductor and having connecting pins for holding the core wires of the shielded cables, for electrically connecting between the core wires of the shielded cables, and a base for holding the external cylinder mechanism and for electrically connecting the external cylinder mechanism to an external conductor.
    Type: Application
    Filed: December 28, 2010
    Publication date: December 6, 2012
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yosuke Watanabe, Yuichi Sasaki, Chiharu Miyazaki, Naoto Oka, Koichiro Misu
  • Patent number: 8243842
    Abstract: A signal separating device the computational complexity of which is reduced and the communication quality of which is improved. A channel matrix interchanging section (110) creates matrices defined by interchanging the elements of channel estimation matrices multiplied by symbol candidates relevant to the final stage. A QR separating/QH multiplying sections (121, 122) each perform QR separation by using the created matrices and perform multiplication of the transposed matrix of the Q matrix of each created matrix by the received signal.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: August 14, 2012
    Assignee: Panasonic Corporation
    Inventor: Naoto Oka
  • Patent number: 7719987
    Abstract: A radio communication device includes a reception unit for receiving a route request message from another radio communication device, a route control message processing unit for judging whether the received route request message is addressed to itself or not, a route request message management unit for deciding a delay amount for delaying response transmission or relay forwarding with regard to the route request message according to an operating state of the radio communication device when the route request message is not addressed to itself, and a delay processing unit which performs response transmission or relay forwarding to the route request message when the delay amount time has expired. Thus, a route selected giving preference to radio communication devices having a preferable operating state can be obtained.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: May 18, 2010
    Assignee: Panasonic Corporation
    Inventors: Hirokazu Kobayashi, Toyoki Kawahara, Takeshi Kanazawa, Naoto Oka
  • Publication number: 20100086067
    Abstract: A signal separating device the computational complexity of which is reduced and the communication quality of which is improved. A channel matrix interchanging section (110) creates matrices defined by interchanging the elements of channel estimation matrices multiplied by symbol candidates relevant to the final stage. A QR separating/QH multiplying sections (121, 122) each perform QR separation by using the created matrices and perform multiplication of the transposed matrix of the Q matrix of each created matrix by the received signal.
    Type: Application
    Filed: September 25, 2007
    Publication date: April 8, 2010
    Applicant: PANASONIC CORPORATION
    Inventor: Naoto Oka
  • Publication number: 20100014430
    Abstract: There are disclosed a resource allocation method and a base station device for realizing an effective resource allocation for reducing delay time and overhead. In this device, when a base station (11) has received an erroneous data packet (22) from a mobile station (10), prior to the initial transmission of the data packet (22), the base station (11) allocates a resource to the mobile station (10) according to contents (such as transmission packet length and priority) of a reservation signal (20) reported from the mobile station (10) and transmits an allocation signal (21) and NACK (23-1) to the mobile station (10).
    Type: Application
    Filed: January 16, 2006
    Publication date: January 21, 2010
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Naoto Oka