Patents by Inventor Naoto Oka
Naoto Oka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11798714Abstract: Resistive elements are formed in belt shape in regions sandwiched between secondary division prediction lines set onto a large substrate and extending in a direction orthogonal to primary division prediction lines, a plurality of front electrodes disposed facing each other at predetermined intervals on the resistive elements are formed so as to be across the primary division prediction lines, a glass coat layer covering each of the resistive elements and extending in the direction orthogonal to the secondary division prediction lines is formed, a resin coat layer covering an entire surface of the large substrate from a top of the glass coat layer is formed, and after that, the large substrate is diced along the primary division prediction lines and the secondary division prediction lines to obtain individual chip base bodies.Type: GrantFiled: May 31, 2022Date of Patent: October 24, 2023Assignee: KOA CORPORATIONInventor: Naoto Oka
-
Publication number: 20230307653Abstract: The present disclosure pertains to a carbon nanotube dispersion that contains carbon nanotubes, a dispersing agent, and a solvent, and that satisfies (1)-(4). (1) The ratio of G/D of the carbon nanotubes being 5-100. (2) Not less than 30 parts by mass but less than 250 parts by mass of the dispersing agent being contained with respect to 100 parts by mass of the carbon nanotubes. (3) The complex elastic modulus and the phase angle of the carbon nanotube dispersion at 25° C. and at a frequency of 1 Hz being, not less than 5 Pa but less than 650 Pa, and being not less than 5° but less than 50°, respectively. (4) The BET specific surface area of the carbon nanotubes being 550-1200 m2/g.Type: ApplicationFiled: October 7, 2021Publication date: September 28, 2023Applicants: TOYO INK SC HOLDINGS CO., LTD., TOYOCOLOR CO., LTD.Inventors: Yu MORITA, Naoto OKA, Tetsuro IZUMIYA, Tomoaki MASUOKA
-
Patent number: 11657932Abstract: A chip resistor including: a rectangular parallelepiped insulating substrate; a strip-shaped resistor; a pair of front electrodes formed on a front surface of the resistor at both ends in the longitudinal direction; an insulating protective layer; and a pair of end face electrodes formed at both ends of the insulating substrate in the longitudinal direction, each of which is connected to each end face of the resistor, corresponding one of the front electrodes, and protective film; and a pair of external electrodes, wherein a cross-sectional shape of each of the front electrodes is almost a triangle in which a side of the end face has a maximum height, and a shape of an end face of each of the end face electrodes is almost a square.Type: GrantFiled: May 24, 2022Date of Patent: May 23, 2023Assignee: KOA CORPORATIONInventor: Naoto Oka
-
Publication number: 20220399140Abstract: A chip resistor including: a rectangular parallelepiped insulating substrate; a strip-shaped resistor; a pair of front electrodes formed on a front surface of the resistor at both ends in the longitudinal direction; an insulating protective layer; and a pair of end face electrodes formed at both ends of the insulating substrate in the longitudinal direction, each of which is connected to each end face of the resistor, corresponding one of the front electrodes, and protective film; and a pair of external electrodes, wherein a cross-sectional shape of each of the front electrodes is almost a triangle in which a side of the end face has a maximum height, and a shape of an end face of each of the end face electrodes is almost a square.Type: ApplicationFiled: May 24, 2022Publication date: December 15, 2022Applicant: KOA CORPORATIONInventor: Naoto OKA
-
Publication number: 20220399143Abstract: Resistive elements are formed in belt shape in regions sandwiched between secondary division prediction lines set onto a large substrate and extending in a direction orthogonal to primary division prediction lines, a plurality of front electrodes disposed facing each other at predetermined intervals on the resistive elements are formed so as to be across the primary division prediction lines, a glass coat layer covering each of the resistive elements and extending in the direction orthogonal to the secondary division prediction lines is formed, a resin coat layer covering an entire surface of the large substrate from a top of the glass coat layer is formed, and after that, the large substrate is diced along the primary division prediction lines and the secondary division prediction lines to obtain individual chip base bodies.Type: ApplicationFiled: May 31, 2022Publication date: December 15, 2022Applicant: KOA CORPORATIONInventor: Naoto OKA
-
Patent number: 11337301Abstract: A printed circuit board includes a line formation layer including a differential line having a first conductor and a second conductor, a first component for a countermeasure against a surge, a first connection conductor having one end connected to the first conductor and another end connected to the first component, a second component for a countermeasure against a surge, a second connection conductor having one end connected to the second conductor and another end connected to the second component, a ground layer, and a dielectric mounted between the line formation layer and the ground layer. Lengths of the first conductor and second conductor are adjusted based on a difference of capacitance values in the circuit board.Type: GrantFiled: June 2, 2017Date of Patent: May 17, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Ayumi Sakai, Fujiyuki Nakamoto, Yuichi Sasaki, Naoto Oka, Hideyuki Ohashi
-
Publication number: 20210337658Abstract: A first capacitance C1 exists between a first connection conductor (21) as well as a first component (31) and a ground layer (3), and a second capacitance C2 exists between a second connection conductor (22) as well as a second component (32) and the ground layer (3). The length of the first conductor (11) and the length of the second conductor (12) are each adjusted depending on a difference ?C between the first capacitance C1 and the second capacitance C2.Type: ApplicationFiled: June 2, 2017Publication date: October 28, 2021Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Ayumi SAKAI, Fujiyuki NAKAMOTO, Yuichi SASAKI, Naoto OKA, Hideyuki OHASHI
-
Publication number: 20190372542Abstract: A sub wiring pattern (21) branches from a first branching portion (20a) of a main wiring pattern (20), and connects to the main wiring pattern (20) at a second branching portion (20b). In a portion of the main wiring pattern (20) from the first branching portion (20a) to the second branching portion (20b), a resistor element (12) and a three-terminal capacitor element (13) are serially connected. The sub wiring pattern (21) is formed so that its path length is larger than a length of a path from the first branching portion (20a) to the second branching portion (20b) in the main wiring pattern (20).Type: ApplicationFiled: February 6, 2017Publication date: December 5, 2019Applicant: Mitsubishi Electric CorporationInventors: Akihito KOBAYASHI, Naoto OKA, Hideyuki OHASHI, Yasuhiro SEKIMOTO
-
Patent number: 10446304Abstract: The invention is to provide a resistor trimming method capable of adjusting a resistance value with ultrahigh precision and having excellent production efficiency. To achieve the object, a start point (S1) at a distance from a resistor (4) is irradiated with laser light while probes are brought into contact with a pair of surface electrodes (3) to measure a resistance value of the resistor (4). The place irradiated with the laser light is scanned so that a first trimming groove (5) extending in a direction perpendicular to a current direction can be formed in the resistor (4). Then, the place irradiated with the laser light is returned by a predetermined amount from an end point (first turning point (T1)) of the first trimming groove (5) to be set as a second turning point (T2). With the second turning point (T2) as a start point, scanning and cutting is performed to forma second trimming groove (6). Thus, the resistance value of the resistor (4) is adjusted to a target resistance value with high precision.Type: GrantFiled: July 22, 2015Date of Patent: October 15, 2019Assignee: KOA CorporationInventors: Naoto Oka, Homare Sasaki
-
Publication number: 20170301439Abstract: The invention is to provide a resistor trimming method capable of adjusting a resistance value with ultrahigh precision and having excellent production efficiency. To achieve the object, a start point (S1) at a distance from a resistor (4) is irradiated with laser light while probes are brought into contact with a pair of surface electrodes (3) to measure a resistance value of the resistor (4). The place irradiated with the laser light is scanned so that a first trimming groove (5) extending in a direction perpendicular to a current direction can be formed in the resistor (4). Then, the place irradiated with the laser light is returned by a predetermined amount from an end point (first turning point (T1)) of the first trimming groove (5) to be set as a second turning point (T2). With the second turning point (T2) as a start point, scanning and cutting is performed to forma second trimming groove (6). Thus, the resistance value of the resistor (4) is adjusted to a target resistance value with high precision.Type: ApplicationFiled: July 22, 2015Publication date: October 19, 2017Applicant: KOA CorporationInventors: Naoto OKA, Homare SASAKI
-
Patent number: 9674712Abstract: A radio communication method includes the steps of: storing a beam having a good characteristic and a beam having a bad characteristic on the basis of a result of beamforming setting; reserving a calibration period; changing a beam to the beam having the bad characteristic in the reserved calibration period; performing calibration in the reserved calibration period; and changing the beam having the bad characteristic to the beam having the good characteristic after the reserved calibration period has elapsed.Type: GrantFiled: February 12, 2015Date of Patent: June 6, 2017Assignee: Panasonic CorporationInventors: Hiroshi Takahashi, Masataka Irie, Naoto Oka, Yoshio Urabe, Takenori Sakamoto, Kazuhiro Ando
-
Patent number: 9270444Abstract: In a signal detection apparatus, power detection section 101 detects power of an inputted received signal, and upon detection of power exceeding a power detection threshold, outputs a trigger to storage section 102. Storage section 102 stores a first received signal upon reception of the trigger and outputs the stored first received signal to multiplier 103 and newly stores a second received signal upon receipt of the next trigger. Multiplier 103 multiplies the second received signal by the first received signal, integrator 104 integrates the multiplication result from multiplier 103 during a predetermined duration to obtain a correlation value of the second and first received signals, and absolute value calculation section 105 calculates an absolute value of the correlation value from integrator 104. Determination section 106 determines the presence/absence of a detection-target signal based on the absolute value of the correlation value from absolute value calculation section 105.Type: GrantFiled: March 12, 2013Date of Patent: February 23, 2016Assignee: Panasonic CorporationInventors: Hiroshi Takahashi, Yoshio Urabe, Kazuhiro Ando, Naoto Oka, Masataka Irie
-
Publication number: 20150245225Abstract: A radio communication method includes the steps of: storing a beam having a good characteristic and a beam having a bad characteristic on the basis of a result of beamforming setting; reserving a calibration period; changing a beam to the beam having the bad characteristic in the reserved calibration period; performing calibration in the reserved calibration period; and changing the beam having the bad characteristic to the beam having the good characteristic after the reserved calibration period has elapsed.Type: ApplicationFiled: February 12, 2015Publication date: August 27, 2015Inventors: HIROSHI TAKAHASHI, MASATAKA IRIE, NAOTO OKA, YOSHIO URABE, TAKENORI SAKAMOTO, KAZUHIRO ANDO
-
Patent number: 8758059Abstract: A cable coupler including an external cylinder mechanism having an inner conductor for electrically connecting the inner conductor itself to the outer conductors of the shielded cables, an outer conductor having a larger diameter than the inner conductor, a gap portion disposed between the inner conductor and the outer conductor, and capacitors arranged in the gap portion, for electrically connecting between the outer conductor and the inner conductor, an inner portion of the external cylinder mechanism being able to be opened and closed along a longitudinal direction, an internal coupling mechanism placed inside the inner conductor and having connecting pins for holding the core wires of the shielded cables, for electrically connecting between the core wires of the shielded cables, and a base for holding the external cylinder mechanism and for electrically connecting the external cylinder mechanism to an external conductor.Type: GrantFiled: December 28, 2010Date of Patent: June 24, 2014Assignee: Mitsubishi Electric CorporationInventors: Yosuke Watanabe, Yuichi Sasaki, Chiharu Miyazaki, Naoto Oka, Koichiro Misu
-
Publication number: 20140056394Abstract: In a signal detection apparatus, power detection section 101 detects power of an inputted received signal, and upon detection of power exceeding a power detection threshold, outputs a trigger to storage section 102. Storage section 102 stores a first received signal upon reception of the trigger and outputs the stored first received signal to multiplier 103 and newly stores a second received signal upon receipt of the next trigger. Multiplier 103 multiplies the second received signal by the first received signal, integrator 104 integrates the multiplication result from multiplier 103 during a predetermined duration to obtain a correlation value of the second and first received signals, and absolute value calculation section 105 calculates an absolute value of the correlation value from integrator 104. Determination section 106 determines the presence/absence of a detection-target signal based on the absolute value of the correlation value from absolute value calculation section 105.Type: ApplicationFiled: March 12, 2013Publication date: February 27, 2014Applicant: Panasonic CorporationInventors: Hiroshi Takahashi, Yoshio Urabe, Kazuhiro Ando, Naoto Oka, Masataka Irie
-
Publication number: 20120309230Abstract: A cable coupler including an external cylinder mechanism having an inner conductor for electrically connecting the inner conductor itself to the outer conductors of the shielded cables, an outer conductor having a larger diameter than the inner conductor, a gap portion disposed between the inner conductor and the outer conductor, and capacitors arranged in the gap portion, for electrically connecting between the outer conductor and the inner conductor, an inner potion of the external cylinder mechanism being able to be opened and closed along a longitudinal direction, an internal coupling mechanism placed inside the inner conductor and having connecting pins for holding the core wires of the shielded cables, for electrically connecting between the core wires of the shielded cables, and a base for holding the external cylinder mechanism and for electrically connecting the external cylinder mechanism to an external conductor.Type: ApplicationFiled: December 28, 2010Publication date: December 6, 2012Applicant: Mitsubishi Electric CorporationInventors: Yosuke Watanabe, Yuichi Sasaki, Chiharu Miyazaki, Naoto Oka, Koichiro Misu
-
Patent number: 8243842Abstract: A signal separating device the computational complexity of which is reduced and the communication quality of which is improved. A channel matrix interchanging section (110) creates matrices defined by interchanging the elements of channel estimation matrices multiplied by symbol candidates relevant to the final stage. A QR separating/QH multiplying sections (121, 122) each perform QR separation by using the created matrices and perform multiplication of the transposed matrix of the Q matrix of each created matrix by the received signal.Type: GrantFiled: September 25, 2007Date of Patent: August 14, 2012Assignee: Panasonic CorporationInventor: Naoto Oka
-
Patent number: 7719987Abstract: A radio communication device includes a reception unit for receiving a route request message from another radio communication device, a route control message processing unit for judging whether the received route request message is addressed to itself or not, a route request message management unit for deciding a delay amount for delaying response transmission or relay forwarding with regard to the route request message according to an operating state of the radio communication device when the route request message is not addressed to itself, and a delay processing unit which performs response transmission or relay forwarding to the route request message when the delay amount time has expired. Thus, a route selected giving preference to radio communication devices having a preferable operating state can be obtained.Type: GrantFiled: March 15, 2005Date of Patent: May 18, 2010Assignee: Panasonic CorporationInventors: Hirokazu Kobayashi, Toyoki Kawahara, Takeshi Kanazawa, Naoto Oka
-
Publication number: 20100086067Abstract: A signal separating device the computational complexity of which is reduced and the communication quality of which is improved. A channel matrix interchanging section (110) creates matrices defined by interchanging the elements of channel estimation matrices multiplied by symbol candidates relevant to the final stage. A QR separating/QH multiplying sections (121, 122) each perform QR separation by using the created matrices and perform multiplication of the transposed matrix of the Q matrix of each created matrix by the received signal.Type: ApplicationFiled: September 25, 2007Publication date: April 8, 2010Applicant: PANASONIC CORPORATIONInventor: Naoto Oka
-
Publication number: 20100014430Abstract: There are disclosed a resource allocation method and a base station device for realizing an effective resource allocation for reducing delay time and overhead. In this device, when a base station (11) has received an erroneous data packet (22) from a mobile station (10), prior to the initial transmission of the data packet (22), the base station (11) allocates a resource to the mobile station (10) according to contents (such as transmission packet length and priority) of a reservation signal (20) reported from the mobile station (10) and transmits an allocation signal (21) and NACK (23-1) to the mobile station (10).Type: ApplicationFiled: January 16, 2006Publication date: January 21, 2010Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventor: Naoto Oka