Patents by Inventor Naoto TAKEISHI

Naoto TAKEISHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9760460
    Abstract: A monitoring server includes a transmission and reception unit that receives information from a first storage device and a second storage device by performing polling to the first storage device and the second storage device at a certain interval, and transmits the received information to the first storage device and the second storage device at next polling. The first storage device and the second storage device includes a failover processing unit that inactivates a communication port when the failover processing unit determines that abnormality has occurred in a communication path between the first storage device and the second storage device and determines, based on the polling from the monitoring server, that abnormality has occurred in a communication path between the storage device and the monitoring server.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: September 12, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Hidemasa Hatano, Minoru Maeda, Naoto Takeishi, Kazuyoshi Watanabe, Takashi Kawada, Shinichi Nishizono, Akihiro Ueda, Kenji Hattori, Atsushi Takakura, Atsushi Katano
  • Publication number: 20150278052
    Abstract: A monitoring server includes a transmission and reception unit that receives information from a first storage device and a second storage device by performing polling to the first storage device and the second storage device at a certain interval, and transmits the received information to the first storage device and the second storage device at next polling. The first storage device and the second storage device includes a failover processing unit that inactivates a communication port when the failover processing unit determines that abnormality has occurred in a communication path between the first storage device and the second storage device and determines, based on the polling from the monitoring server, that abnormality has occurred in a communication path between the storage device and the monitoring server.
    Type: Application
    Filed: February 25, 2015
    Publication date: October 1, 2015
    Inventors: Hidemasa HATANO, Minoru MAEDA, Naoto TAKEISHI, Kazuyoshi WATANABE, Takashi KAWADA, Shinichi NISHIZONO, Akihiro UEDA, Kenji HATTORI, Atsushi TAKAKURA, Atsushi KATANO
  • Patent number: 9069742
    Abstract: A memory stores therein a program status word containing an address of data that is to be read when an interrupt process is executed. a processor determines whether or not the program status word stored in the memory is available, controls the memory to stores a determination result in the memory in association with the program status word, acquires the program status word and the determination result from the memory when the interrupt process occurs, and reads data on the basis of the address contained in the acquired program status word when the acquired determination result indicates that the program status word is available.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: June 30, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Naoto Takeishi, Kazuyoshi Watanabe
  • Publication number: 20150178228
    Abstract: A memory stores therein a program status word containing an address of data that is to be read when an interrupt process is executed a processor determines whether or not the program status word stored in the memory is available, controls the memory to stores a determination result in the memory in association with the program status word, acquires the program status word and the determination result from the memory when the interrupt process occurs, and reads data on the basis of the address contained in the acquired program status word when the acquired determination result indicates that the program status word is available.
    Type: Application
    Filed: March 10, 2015
    Publication date: June 25, 2015
    Inventors: Naoto TAKEISHI, Kazuyoshi WATANABE
  • Patent number: 9009422
    Abstract: A memory stores therein a program status word containing an address of data that is to be read when an interrupt process is executed. a processor determines whether or not the program status word stored in the memory is available, controls the memory to stores a determination result in the memory in association with the program status word, acquires the program status word and the determination result from the memory when the interrupt process occurs, and reads data on the basis of the address contained in the acquired program status word when the acquired determination result indicates that the program status word is available.
    Type: Grant
    Filed: August 3, 2011
    Date of Patent: April 14, 2015
    Assignee: Fujitsu Limited
    Inventors: Naoto Takeishi, Kazuyoshi Watanabe
  • Publication number: 20120042137
    Abstract: A memory stores therein a program status word containing an address of data that is to be read when an interrupt process is executed. a processor determines whether or not the program status word stored in the memory is available, controls the memory to stores a determination result in the memory in association with the program status word, acquires the program status word and the determination result from the memory when the interrupt process occurs, and reads data on the basis of the address contained in the acquired program status word when the acquired determination result indicates that the program status word is available.
    Type: Application
    Filed: August 3, 2011
    Publication date: February 16, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Naoto TAKEISHI, Kazuyoshi WATANABE