Patents by Inventor Naoya Hattori
Naoya Hattori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11496547Abstract: Provided is a storage system capable of avoiding the increase in communication between nodes in the coordination of the file service and the block service. This is a storage system in which a plurality of nodes, which provide a file service for performing I/O in file units and a block service for performing I/O in block units, are connected via a network, and the storage system comprises a management unit which manages the first file processing unit and the second file processing unit as a pair, sets the first file processing unit to be operable, manages the first block processing unit and the second block processing unit as a pair, and sets the first block processing unit to be operable.Type: GrantFiled: September 28, 2021Date of Patent: November 8, 2022Assignee: Hitachi, Ltd.Inventors: Yoshifumi Mimata, Yoshiaki Eguchi, Naoya Hattori
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Publication number: 20220334863Abstract: When a cluster is configured by hypervisors of a plurality of servers, a shared storage including internal storages of the plurality of servers can be used. In a storage system in which a hypervisor managing VMs on each of the plurality of servers is included and the plurality of hypervisors configures a cluster, the plurality of servers each include a storage VM that provides the shared storage. One of the plurality of servers includes a manager VM that manages the hypervisors of the plurality of servers as the cluster. A virtual volume of the shared storage is provided as an LU for constructing the manager VM.Type: ApplicationFiled: September 2, 2021Publication date: October 20, 2022Inventors: Hiroshi MIKI, Naoya HATTORI, Tomohiro SHINOHARA
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Publication number: 20220038526Abstract: Provided is a storage system capable of avoiding the increase in communication between nodes in the coordination of the file service and the block service. This is a storage system in which a plurality of nodes, which provide a file service for performing I/O in file units and a block service for performing I/O in block units, are connected via a network, and the storage system comprises a management unit which manages the first file processing unit and the second file processing unit as a pair, sets the first file processing unit to be operable, manages the first block processing unit and the second block processing unit as a pair, and sets the first block processing unit to be operable.Type: ApplicationFiled: September 28, 2021Publication date: February 3, 2022Inventors: Yoshifumi MIMATA, Yoshiaki EGUCHI, Naoya HATTORI
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Patent number: 11165850Abstract: Provided is a storage system capable of avoiding the increase in communication between nodes in the coordination of the file service and the block service. This is a storage system in which a plurality of nodes, which provide a file service for performing I/O in file units and a block service for performing I/O in block units, are connected via a network, and the storage system comprises a management unit which manages the first file processing unit and the second file processing unit as a pair, sets the first file processing unit to be operable, manages the first block processing unit and the second block processing unit as a pair, and sets the first block processing unit to be operable.Type: GrantFiled: September 30, 2020Date of Patent: November 2, 2021Assignee: HITACHI, LTD.Inventors: Yoshifumi Mimata, Yoshiaki Eguchi, Naoya Hattori
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Publication number: 20170277632Abstract: A hypervisor that allocates the computer resource of a physical computer to one or more logical partitions allocates the computer resource to be allocated to the logical partitions to the logical partitions; generates, as address conversion information, the relationship between a guest physical address and a host physical address with respect to a memory of the computer resource; enables a first address conversion portion of a processor using the address conversion information; disables the first address conversion portion after the starting of a guest OS is completed; and causes an application to be executed.Type: ApplicationFiled: October 30, 2014Publication date: September 28, 2017Applicant: Hitachi, Ltd.Inventors: Toshiomi MORIKI, Naoya HATTORI, Takayuki IMADA
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Patent number: 9697024Abstract: A first processor group of physical processors having hardware-assisted virtualization set disabled among the plurality of physical processors; a second processor group of physical processors having the hardware-assisted virtualization set enabled among the plurality of physical processors; a first OS to which the first processor group is allocated; and a virtualization part to which the second processor group is allocated, the virtualization part is configured to: allocate a predetermined area within the memory and a predetermined one of the plurality of physical processors within the second processor group to the second OS as the virtualized processor, and boot the second OS to be provided as the virtual machine; and set a shared area, which is readable/writable by both the first OS and the virtualization part, and set interrupt routing information comprising a correspondence relationship between a logical interrupt to the second OS and a physical interrupt thereto.Type: GrantFiled: May 12, 2014Date of Patent: July 4, 2017Assignee: HITACHI, LTD.Inventors: Takayuki Imada, Toshiomi Moriki, Naoya Hattori
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Patent number: 9495172Abstract: A computer system with a plurality of processors having a hardware-assisted virtualization and a memory, the computer system including a first processor group of the processors having hardware-assisted virtualization set disabled, and a second processor group of the processors and having hardware-assisted virtualization set enabled, the method having: booting a first OS by assigning the first processor group to the first OS; booting a virtual machine monitor to boot a virtual machine by assigning the second processor group to the virtual machine monitor; performed by the virtual machine monitor, booting a second OS by assigning a certain area of the memory to the second OS; and performed by the virtual machine monitor, setting a data path through which the first OS and second OS communicate with each other, the data path being set in the memory.Type: GrantFiled: April 15, 2014Date of Patent: November 15, 2016Assignee: Hitachi, Ltd.Inventors: Toshiomi Moriki, Takayuki Imada, Naoya Hattori
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Patent number: 9396013Abstract: A next-generation OS with a virtualization feature is executed as a user program on a first virtual processor by selecting, in response to a cause of a call for a host VMM, one of a guest status area (221) for executing a user program on a second virtual processor and a host status area (222) for executing the guest VMM, and by updating a guest status area (131) of a shadow VMCS for controlling a physical processor. Accordingly, without a decrease in performance of a virtual computer, the next-generation OS incorporating the virtualization feature is executed on a virtual server, and the next-generation OS and an existing OS are integrated on a single physical computer.Type: GrantFiled: February 27, 2015Date of Patent: July 19, 2016Assignee: Hitachi, Ltd.Inventors: Toshiomi Moriki, Naoya Hattori, Yuji Tsushima
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Patent number: 9304794Abstract: Provided is a virtual machine including a first virtualization module operating on a physical CPU, for providing a first CPU, and a second virtualization module operating on the first CPU, for providing second CPU. The second virtualization module includes first processor control information holding a state of the first CPU obtained at a time of execution of the user program. The first virtualization module includes second processor control information containing a state of the physical CPU obtained at the time of the execution of the second virtualization module, third processor control information containing a state of the physical CPU obtained at the time of the execution of the user program, and prefetch entry information in which information to be prefetched from the third processor control information is set, and, upon detection of a event, the information set in the prefetch entry information is reflected to the first processor control information.Type: GrantFiled: April 10, 2013Date of Patent: April 5, 2016Assignee: HITACHI, LTD.Inventors: Toshiomi Moriki, Naoya Hattori, Yuji Tsushima
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Patent number: 9288155Abstract: A computer system, comprising: a virtual computer system and a verification system, the virtual computer system including: a deployment request reception part for receiving a deployment request; a server search part for searching for a server, for which a security strength equal to or larger than the security strength associated with target image data is set; a deployment instruction part for instructing the retrieved server to deploy the target image data; and a virtual computer management part for generating a virtual computer for executing an application on the retrieved server by using the target image data, and transmitting a integrity report, which is obtained on the boot of the virtual computer for executing the application and used to verify the integrity relating to the virtual computer for executing the application, to a verification server.Type: GrantFiled: February 12, 2014Date of Patent: March 15, 2016Assignee: Hitachi, Ltd.Inventors: Keitaro Uehara, Naoya Hattori
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Patent number: 9207939Abstract: There is a need for providing the Xeon CPU with a two-level VM that is independent of VMM types and prevents the throughput from degrading when the OS operates the privilege register. A machine is provided with a processor and memory. The machine includes a first virtual machine manager for managing a virtual machine, a second virtual machine for managing an operating system, first management information, and second management information. The processor is provided with a register and a shadowing function. The machine uses a virtualization method. The first virtual machine manager detects a call from the second virtual machine manager. The first virtual machine manager enables the shadowing function when it is determined that an instruction for enabling the shadowing function caused the call.Type: GrantFiled: December 29, 2010Date of Patent: December 8, 2015Assignee: HITACHI, LTD.Inventors: Naoya Hattori, Toshiomi Moriki, Yoshiko Yasuda
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Patent number: 9176806Abstract: In a memory inspection in a computer installing a x86 CPU, system software related to low-frequent processing is prevented from going down, and the suppression of performance degradation and the avoidance of a reduction in memory capacity by the memory inspection is realized. The computer having a processor, a memory, and an I/O device. The memory stores a system software realizing a system control unit, and an inspection program realizing an inspection unit. The processor has a memory fault notifying unit notifying the system control unit of a fault address. The system control unit includes an adjustment unit that determines whether the inspection program needs to be executed, or not, based on the type of event occurring, plural event processing units processing the event by using different storage areas of the memory, a fault recording unit recording the memory fault, and an event processing unit selector.Type: GrantFiled: May 7, 2013Date of Patent: November 3, 2015Assignee: HITACHI, LTD.Inventors: Naoya Hattori, Toshiomi Moriki
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Patent number: 9098321Abstract: A virtual machine booting method for booting a virtual machine, the virtual machine comprising: a physical computer which includes a processor, a memory, and storage; and a virtualization module which assigns computer resources of the physical computer to the virtual machine, the method comprising: setting, by the virtualization module, before the virtual machine is booted, states of a first access path and a second access path which couple the virtual machine and the storage; booting the virtual machine by the virtualization module; determining, by the virtualization module, when to switch between the first access path and the second access path; and switching the first access path to the second access path when the virtualization module determines that it is time to switch between the first access path and the second access path.Type: GrantFiled: August 14, 2012Date of Patent: August 4, 2015Assignee: Hitachi, Ltd.Inventors: Tetsuya Uemura, Naoya Hattori
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Patent number: 9081612Abstract: A virtual machine control method and a virtual machine having the dual objectives of utilizing NIC on a virtual machine that creates sub-virtual machines operated by a VMM on virtual machines generated by a hypervisor to avoid software copying by the VMM and to prevent band deterioration during live migration or adding sub-virtual machines. In a virtual machine operating plural virtualization software on a physical machine including a CPU, memory, and multi-queue NIC; a virtual multi-queue NIC is loaded in the virtual machine, for virtual queues included in the virtual multi-queue NIC, physical queues configuring the multi-queue NIC are assigned to virtual queues where usage has started, and the physical queues are allowed direct access to the virtual machine memory.Type: GrantFiled: February 1, 2013Date of Patent: July 14, 2015Assignee: Hitachi, Ltd.Inventors: Naoya Hattori, Hitoshi Hayakawa, Yuji Tsushima
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Publication number: 20150169346Abstract: A next-generation OS with a virtualization feature is executed as a user program on a first virtual processor by selecting, in response to a cause of a call for a host VMM, one of a guest status area (221) for executing a user program on a second virtual processor and a host status area (222) for executing the guest VMM, and by updating a guest status area (131) of a shadow VMCS for controlling a physical processor. Accordingly, without a decrease in performance of a virtual computer, the next-generation OS incorporating the virtualization feature is executed on a virtual server, and the next-generation OS and an existing OS are integrated on a single physical computer.Type: ApplicationFiled: February 27, 2015Publication date: June 18, 2015Inventors: Toshiomi MORIKI, Naoya HATTORI, Yuji TSUSHIMA
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Patent number: 9009701Abstract: A next-generation OS with a virtualization feature is executed as a user program on a first virtual processor by selecting, in response to a cause of a call for a host VMM, one of a guest status area (221) for executing a user program on a second virtual processor and a host status area (222) for executing the guest VMM, and by updating a guest status area (131) of a shadow VMCS for controlling a physical processor. Accordingly, without a decrease in performance of a virtual computer, the next-generation OS incorporating the virtualization feature is executed on a virtual server, and the next-generation OS and an existing OS are integrated on a single physical computer.Type: GrantFiled: June 17, 2008Date of Patent: April 14, 2015Assignee: Hitachi, Ltd.Inventors: Toshiomi Moriki, Naoya Hattori, Yuji Tsushima
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Patent number: 8954963Abstract: A method of controlling a virtual machine of a computer, the computer comprising: a physical machine comprising an I/O adapter having a physical function that creates a virtual function; a virtualization unit that provides computer resources of the physical machine to the virtual machine; and an OS that is executed on the virtual machine, the virtualization unit creating a virtual machine to which the virtual function is assigned, the virtual machine running the OS thereon, the method comprising: a first step of detecting, by the virtualization unit, a state change of the I/O adapter; a second step of identifying, by the virtualization unit, when a state of the I/O adapter becomes a predetermined state, the virtual machine to which the virtual function is assigned; and a third step of notifying, by the virtualization unit, the OS running on the identified virtual machine of the state of the I/O adapter.Type: GrantFiled: February 8, 2012Date of Patent: February 10, 2015Assignee: Hitachi, Ltd.Inventors: Naoya Hattori, Yuta Sawa, Keitaro Uehara
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Publication number: 20150026678Abstract: A first processor group of physical processors having hardware-assisted virtualization set disabled among the plurality of physical processors; a second processor group of physical processors having the hardware-assisted virtualization set enabled among the plurality of physical processors; a first OS to which the first processor group is allocated; and a virtualization part to which the second processor group is allocated, the virtualization part is configured to: allocate a predetermined area within the memory and a predetermined one of the plurality of physical processors within the second processor group to the second OS as the virtualized processor, and boot the second OS to be provided as the virtual machine; and set a shared area, which is readable/writable by both the first OS and the virtualization part, and set interrupt routing information comprising a correspondence relationship between a logical interrupt to the second OS and a physical interrupt thereto.Type: ApplicationFiled: May 12, 2014Publication date: January 22, 2015Applicant: Hitachi, Ltd.Inventors: Takayuki IMADA, Toshiomi MORIKI, Naoya HATTORI
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Publication number: 20140359267Abstract: A computer system with a plurality of processors having a hardware-assisted virtualization and a memory, the computer system including a first processor group of the processors having hardware-assisted virtualization set disabled, and a second processor group of the processors and having hardware-assisted virtualization set enabled, the method having: booting a first OS by assigning the first processor group to the first OS; booting a virtual machine monitor to boot a virtual machine by assigning the second processor group to the virtual machine monitor; performed by the virtual machine monitor, booting a second OS by assigning a certain area of the memory to the second OS; and performed by the virtual machine monitor, setting a data path through which the first OS and second OS communicate with each other, the data path being set in the memory.Type: ApplicationFiled: April 15, 2014Publication date: December 4, 2014Applicant: Hitachi, Ltd.Inventors: Toshiomi MORIKI, Takayuki IMADA, Naoya HATTORI
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Patent number: 8881150Abstract: In an exemplary computing machine of the invention, a shared IO device used by a first virtual machine and the second virtual machine includes a physical IO device and a virtual IO device controlled by the physical IO device. In the case of detecting that the first driver has transmitted a stop signal for stopping the physical IO device, a hypervisor keeps the stop signal from being transmitted to the shared IO device, determines whether or not a processing request transmitted by the second driver to the virtual IO device has been completed, and stops the physical IO device with the completion of the processing request as a trigger.Type: GrantFiled: October 10, 2012Date of Patent: November 4, 2014Assignee: Hitachi, Ltd.Inventors: Yuta Sawa, Naoya Hattori, Yuji Tsushima