Patents by Inventor Naoya Imahashi

Naoya Imahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8422442
    Abstract: There is provided a radio communication apparatus that performs communication in a plurality of different radio communication systems independently of one another and is capable of normally performing data communication with interference in the data communication avoided. The radio communication apparatus includes modems respectively corresponding to DECT communication and GSM communication respectively utilizing close frequency bands for transmitting/receiving data, and is configured so that communication time slots not used for time division multiplex domestic radio communication or for time division multiplex subscriber channel radio communication may be adjusted between the modems by a modern controller 208 for avoiding simultaneous communication timing.
    Type: Grant
    Filed: June 12, 2008
    Date of Patent: April 16, 2013
    Assignee: Panasonic Corporation
    Inventors: Naoya Imahashi, Souichi Kawata
  • Patent number: 7831004
    Abstract: In a synchronous detection circuit, an interpolation circuit regulates an interpolation calculation coefficient based on phase shift information when carrying out interpolation calculation processing over a digitally converted received signal. A sampling circuit samples interpolation data using a recovered clock as a reference and two clocks having phases which are advanced and delayed with respect to the recovered clock. A phase shift detecting circuit monitors a phase shift using three sampling data output from the sampling circuit and outputting phase shift information to the interpolation circuit when detecting a predetermined phase shift. A demodulating circuit performs demodulation processing using the data subjected to the sampling with the recovered clock output from the sampling circuit. Where a synchronous shift is detected, the interpolation circuit performs regulation to match a timing having a maximum signal-to-noise ratio and the recovered clock based on the amount of the phase shift.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: November 9, 2010
    Assignee: Panasonic Corporation
    Inventors: Naoya Imahashi, Masakazu Hoashi, Junnei Baba, Yoshihito Yamamoto
  • Publication number: 20100183061
    Abstract: There is provided a radio communication apparatus that performs communication in a plurality of different radio communication systems independently of one another and is capable of normally performing data communication with interference in the data communication avoided. The radio communication apparatus includes modems respectively corresponding to DECT communication and GSM communication respectively utilizing close frequency bands for transmitting/receiving data, and is configured so that communication time slots not used for time division multiplex domestic radio communication or for time division multiplex subscriber channel radio communication may be adjusted between the modems by a modern controller 208 for avoiding simultaneous communication timing.
    Type: Application
    Filed: June 12, 2008
    Publication date: July 22, 2010
    Applicant: Panasonic Corporation
    Inventors: Naoya Imahashi, Souichi Kawata
  • Publication number: 20070286318
    Abstract: A synchronous detection circuit includes: an interpolation circuit for regulating an interpolation calculation coefficient based on phase shift information when carrying out an interpolation calculation processing over a received signal which is digitally converted; a secondary sampling circuit for sampling interpolation data output from the interpolation circuit by using a recovered clock to be a reference and two clocks having phases corresponding to one processing clock which are advanced and delayed for the recovered clock; a phase shift detecting circuit for monitoring a shift of a phase by using three sampling data output from the secondary sampling circuit and outputting phase shift information to the interpolation circuit when detecting a predetermined phase shift; and a demodulating circuit for carrying out a demodulation processing by using the data subjected to the sampling with the recovered clock output from the secondary sampling circuit.
    Type: Application
    Filed: June 12, 2007
    Publication date: December 13, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Naoya IMAHASHI, Masakazu HOASHI, Junnei BABA, Yoshihito YAMAMOTO
  • Patent number: 7233994
    Abstract: The present invention relates to a network connection apparatus for connecting a plurality of network terminals to an external network such as the Internet. In accordance with the present invention, there provides an easy-to-use network connection apparatus capable of building up an easy and flexible network system by providing the user with plurality types of interface. Specifically, the network connection apparatus comprises a first interface unit including at least one physical layer for connecting to an external network, a second interface unit including a plurality of physical layers for connecting to an internal network, and a controller for controlling the first interface unit and the second interface unit, wherein the second interface unit is capable of independent operation from the first interface unit, and the controller transmits and receives information between the first interface unit and second interface unit, and between the second interface units.
    Type: Grant
    Filed: November 2, 2000
    Date of Patent: June 19, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Naoki Koga, Naoya Imahashi, Souichi Kawata, Mitsuhiro Koba, Tomiya Miyazaki, Tetsuya Tobeta, Hideyuki Furukawa, Shoichiro Kikuchi