Patents by Inventor Naoya Kono

Naoya Kono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160026063
    Abstract: A modulator including: a Mach-Zehnder modulator that includes an optical waveguide disposed on a substrate, the optical waveguide including an electrode thereon; a resin layer disposed on the substrate, the resin layer embedding the optical waveguide, the resin layer having a groove arranged besides the optical waveguide; a termination resistor disposed on the substrate in the groove of the resin layer; and a first wiring disposed on the resin layer, the first wiring being connected to the termination resistor and the electrode of the optical waveguide.
    Type: Application
    Filed: July 21, 2015
    Publication date: January 28, 2016
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki YAGI, Hirohiko Kobayashi, Naoya Kono, Takamitsu Kitamura
  • Patent number: 9229293
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of growing a stacked layer including lower and upper core layers, a first upper region including a non-doped layer, a second upper region including a p-type layer, and a cap layer; forming an upper mesa by etching the stacked layer; selectively etching the cap layer in the upper mesa on the first and second regions; forming a mask on the upper mesa in the second and third regions; and etching the upper mesa using the mask so as to form first to fourth mesa portions. The first and fourth mesa portions are formed by etching the first and second upper regions, and the second upper region and the cap layer, respectively. The second and third mesa portions are formed by etching the first and second upper regions, and the second upper region and the cap layer, respectively.
    Type: Grant
    Filed: August 8, 2014
    Date of Patent: January 5, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Naoya Kono, Hideki Yagi, Takamitsu Kitamura
  • Patent number: 9229168
    Abstract: A semiconductor optical waveguide device includes a substrate having a first area and a second area, and first, second, and semiconductor mesas on the substrate. The first semiconductor mesa includes a cladding layer and a first mesa portion on the second area, the first mesa portion including first and second portions. The second semiconductor mesa includes an intermediate layer, a first core layer, and first and second mesa portions on the first and second areas, respectively. The third semiconductor mesa includes a second core layer, and first and second mesa portions having a greater width than that of the second semiconductor mesa. The first portion of the first semiconductor mesa has a substantially same width as the second mesa portion of the second semiconductor mesa. The first core layer is optically coupled to the second core layer through the intermediate layer disposed between the first and second core layers.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: January 5, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Akira Furuya, Takamitsu Kitamura, Hideki Yagi, Naoya Kono
  • Patent number: 9217908
    Abstract: An optical modulator includes main input and output ports; first and second Mach-Zehnder modulators; a first branching waveguide optically coupling the main input port to the first and second Mach-Zehnder modulators; a first driver circuit connected to the first Mach-Zehnder modulator, the first driver circuit generating a first drive signal having a first amplitude at a first bias point; and a second driver circuit connected to the second Mach-Zehnder modulator, the second driver circuit generating a second drive signal having a second amplitude at a second bias point. The first and second drive signals satisfy at least one of a first condition and a second condition. The first condition is that the first amplitude differs from the second amplitude. The second condition is that the first bias point differs from the second bias point.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: December 22, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoya Kono
  • Patent number: 9176360
    Abstract: A method for producing a spot-size convertor includes the steps of preparing a substrate; forming a stacked semiconductor layer including first and second core layers on the substrate; forming a mesa structure by etching the stacked semiconductor layer using a first mask, the mesa structure including a side surface and a bottom portion of the first core layer; forming a protective mask covering the side surface; etching the bottom portion using the protective mask to form a top mesa; and forming a bottom mesa by etching the second core layer using a second mask. The top mesa includes the first core layer and a portion having a mesa width gradually reduced in a first direction of a waveguide axis. The bottom mesa includes the second core layer and a portion having a mesa width gradually reduced in a second direction opposite to the first direction.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: November 3, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Yagi, Naoko Konishi, Takamitsu Kitamura, Naoya Kono
  • Publication number: 20150260915
    Abstract: A method for manufacturing a semiconductor optical waveguide device includes the steps of forming a waveguide mesa having first and second portions by etching a stacked semiconductor layer through a first mask; forming a dummy buried region embedding a top surface and side surfaces of the waveguide mesa; forming a second mask on the dummy buried region, the second mask having an opening on the first portion and having a pattern on the second portion; forming a third mask having an opening that reaches a top surface of the first portion, the third mask including a dummy buried mask formed by etching the dummy buried region through the second mask; forming an upper mesa by etching the waveguide mesa through the third mask; and after removing the third mask, forming a lower mesa by etching the stacked semiconductor layer, the lower mesa having a greater width than that of the upper mesa.
    Type: Application
    Filed: March 13, 2015
    Publication date: September 17, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takamitsu KITAMURA, Hideki YAGI, Naoya KONO
  • Patent number: 9081253
    Abstract: An integrated optical device includes first, second, third, and fourth edge portions; a plurality of modulators each of which includes an optical waveguide and an electrode portion provided on the optical waveguide, the optical waveguide extending in a direction of a first axis; a plurality of electric signal input sections arrayed along the first edge portion extending in a direction of a second axis intersecting with the first axis, each of the electric signal input sections being connected to one of the electrode portions of the modulators; an optical signal input section; and an optical signal output section provided in the second edge portion extending in the direction of the second axis. The modulators are arrayed in the direction of the second axis. In addition, the optical signal input section is provided in one of the second edge portion, the third edge portion, and the fourth edge portion.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: July 14, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoya Kono
  • Patent number: 9046703
    Abstract: A semiconductor optical modulator includes optical input and output portions; a plurality of Mach-Zehnder modulators, each including first and second waveguide arms having first and second modulation electrodes, respectively; an optical demultiplexer coupled between the optical input portion and the Mach-Zehnder modulators through an optical waveguide; an optical multiplexer coupled between the optical output portion and the Mach-Zehnder modulators; a plurality of electrical inputs; and a plurality of differential transmission lines electrically connecting the electrical inputs to the Mach-Zehnder modulators. The first modulation electrode and the second modulation electrode of at least one of the Mach-Zehnder modulators, one of the electrical inputs, and one of the differential transmission lines that connects such one electrical input to such one Mach-Zehnder modulator form an electrical circuit having a differential impedance in a range of 80? to 95?.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: June 2, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Chie Fukuda, Naoya Kono, Morihiro Seki, Kazuhiro Yamaji, Yasuyuki Yamauchi, Keiji Tanaka, Taizo Tatsumi, Naoki Itabashi
  • Patent number: 8958664
    Abstract: A semiconductor optical modulator includes a substrate; and a mesa portion having a first cladding layer disposed on the substrate, a core layer disposed on the first cladding layer, and a second cladding layer disposed on the core layer, the first cladding layer having a first conductivity type, the second cladding layer having a second conductivity type reverse to the first conductivity type. The core layer includes a first multi quantum well structure made from a first conductivity type semiconductor layer and a second multi quantum well structure made from an i-type semiconductor layer in which no impurity is intentionally doped. The second multi quantum well structure is disposed on the first cladding layer. The first multi quantum well structure is disposed on the second multi quantum well structure. The second cladding layer is disposed on the first multi quantum well structure.
    Type: Grant
    Filed: February 25, 2013
    Date of Patent: February 17, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Naoya Kono
  • Publication number: 20150043867
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of growing a stacked layer including lower and upper core layers, a first upper region including a non-doped layer, a second upper region including a p-type layer, and a cap layer; forming an upper mesa by etching the stacked layer; selectively etching the cap layer in the upper mesa on the first and second regions; forming a mask on the upper mesa in the second and third regions; and etching the upper mesa using the mask so as to form first to fourth mesa portions. The first and fourth mesa portions are formed by etching the first and second upper regions, and the second upper region and the cap layer, respectively. The second and third mesa portions are formed by etching the first and second upper regions, and the second upper region and the cap layer, respectively.
    Type: Application
    Filed: August 8, 2014
    Publication date: February 12, 2015
    Inventors: Naoya KONO, Hideki YAGI, Takamitsu KITAMURA
  • Publication number: 20150024527
    Abstract: A method for producing a spot-size convertor includes the steps of preparing a substrate; forming a stacked semiconductor layer including first and second core layers on the substrate; forming a mesa structure by etching the stacked semiconductor layer using a first mask, the mesa structure including a side surface and a bottom portion of the first core layer; forming a protective mask covering the side surface; etching the bottom portion using the protective mask to form a top mesa; and forming a bottom mesa by etching the second core layer using a second mask. The top mesa includes the first core layer and a portion having a mesa width gradually reduced in a first direction of a waveguide axis. The bottom mesa includes the second core layer and a portion having a mesa width gradually reduced in a second direction opposite to the first direction.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 22, 2015
    Inventors: Hideki YAGI, Naoko KONISHI, Takamitsu KITAMURA, Naoya KONO
  • Publication number: 20140307996
    Abstract: An optical modulator includes main input and output ports; first and second Mach-Zehnder modulators; a first branching waveguide optically coupling the main input port to the first and second Mach-Zehnder modulators; a first driver circuit connected to the first Mach-Zehnder modulator, the first driver circuit generating a first drive signal having a first amplitude at a first bias point; and a second driver circuit connected to the second Mach-Zehnder modulator, the second driver circuit generating a second drive signal having a second amplitude at a second bias point. The first and second drive signals satisfy at least one of a first condition and a second condition. The first condition is that the first amplitude differs from the second amplitude. The second condition is that the first bias point differs from the second bias point.
    Type: Application
    Filed: April 11, 2014
    Publication date: October 16, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoya KONO
  • Publication number: 20140254998
    Abstract: A semiconductor optical waveguide device includes a substrate having a first area and a second area, and first, second, and semiconductor mesas on the substrate. The first semiconductor mesa includes a cladding layer and a first mesa portion on the second area, the first mesa portion including first and second portions. The second semiconductor mesa includes an intermediate layer, a first core layer, and first and second mesa portions on the first and second area, respectively. The third semiconductor mesa includes a second core layer, and first and second mesa portions having a greater width than that of the second semiconductor mesa. The first portion of the first semiconductor mesa has a substantially the same width as the second mesa portion of the second semiconductor mesa. The first core layer is optically coupled to the second core layer through the intermediate layer disposed between the first and second core layers.
    Type: Application
    Filed: March 5, 2014
    Publication date: September 11, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Akira FURUYA, Takamitsu KITAMURA, Hideki YAGI, Naoya KONO
  • Publication number: 20140241659
    Abstract: A semiconductor optical modulator includes optical input and output portions; a plurality of Mach-Zehnder modulators including first and second waveguide arms having first and second modulation electrodes, respectively; an optical demultiplexer coupled between the optical input portion and the Mach-Zehnder modulator through an optical waveguide; an optical multiplexer coupled between the optical output portion and the Mach-Zehnder modulator; a plurality of electrical inputs including first, second, and common electrodes disposed between the first and second electrodes; and a plurality of differential transmission lines electrically connecting the electrical inputs to the Mach-Zehnder modulators. The Mach-Zehnder modulators, the optical demultiplexer, the optical multiplexer, the electrical inputs, and the differential transmission lines are disposed on a single substrate.
    Type: Application
    Filed: February 26, 2014
    Publication date: August 28, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Chie FUKUDA, Naoya KONO, Morihiro SEKI, Kazuhiro YAMAJI, Yasuyuki YAMAUCHI, Keiji TANAKA, Taizo TATSUMI, Naoki ITABASHI
  • Patent number: 8735868
    Abstract: A semiconductor optical modulator includes a first n-type semiconductor region, a first p-type semiconductor region, an i-type semiconductor region, a second p-type semiconductor region, and a second n-type semiconductor region that constitute a stacked layer structure. The stacked layer structure includes a first cladding layer, a second cladding layer, and a core layer disposed between the first and second cladding layer. The first n-type semiconductor region and the first p-type semiconductor region form a first p-n junction disposed in an intermediate region between the first and second cladding layer. The second p-type semiconductor region and the second n-type semiconductor region form a second p-n junction disposed in the intermediate region or the second cladding layer. The intermediate region, the first n-type semiconductor region, and the second n-type semiconductor region include the core layer, the first cladding layer, and part or all of the second cladding layer, respectively.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: May 27, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Naoya Kono
  • Publication number: 20140133794
    Abstract: An integrated optical device includes first, second, third, and fourth edge portions; a plurality of modulators each of which includes an optical waveguide and an electrode portion provided on the optical waveguide, the optical waveguide extending in a direction of a first axis; a plurality of electric signal input sections arrayed along the first edge portion extending in a direction of a second axis intersecting with the first axis, each of the electric signal input sections being connected to one of the electrode portions of the modulators; an optical signal input section; and an optical signal output section provided in the second edge portion extending in the direction of the second axis. The modulators are arrayed in the direction of the second axis. In addition, the optical signal input section is provided in one of the second edge portion, the third edge portion, and the fourth edge portion.
    Type: Application
    Filed: November 8, 2013
    Publication date: May 15, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoya KONO
  • Publication number: 20130234112
    Abstract: A semiconductor optical modulator includes a first n-type semiconductor region, a first p-type semiconductor region, an i-type semiconductor region, a second p-type semiconductor region, and a second n-type semiconductor region that constitute a stacked layer structure. The stacked layer structure includes a first cladding layer, a second cladding layer, and a core layer disposed between the first and second cladding layer. The first n-type semiconductor region and the first p-type semiconductor region form a first p-n junction disposed in an intermediate region between the first and second cladding layer. The second p-type semiconductor region and the second n-type semiconductor region form a second p-n junction disposed in the intermediate region or the second cladding layer. The intermediate region, the first n-type semiconductor region, and the second n-type semiconductor region include the core layer, the first cladding layer, and part or all of the second cladding layer, respectively.
    Type: Application
    Filed: February 27, 2013
    Publication date: September 12, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoya KONO
  • Publication number: 20130230268
    Abstract: A semiconductor optical modulator includes a substrate; and a mesa portion having a first cladding layer disposed on the substrate, a core layer disposed on the first cladding layer, and a second cladding layer disposed on the core layer, the first cladding layer having a first conductivity type, the second cladding layer having a second conductivity type reverse to the first conductivity type. The core layer includes a first multi quantum well structure made from a first conductivity type semiconductor layer and a second multi quantum well structure made from an i-type semiconductor layer in which no impurity is intentionally doped. The second multi quantum well structure is disposed on the first cladding layer. The first multi quantum well structure is disposed on the second multi quantum well structure. The second cladding layer is disposed on the first multi quantum well structure.
    Type: Application
    Filed: February 25, 2013
    Publication date: September 5, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoya KONO
  • Patent number: 8306072
    Abstract: A semiconductor laser device includes a lower cladding layer; an active layer disposed on the lower cladding layer; all upper cladding layer disposed on the active layer; a diffraction-grating layer disposed on the upper cladding layer, the diffraction-grating layer including periodic projections and recesses; and a buried layer disposed on the periodic projections and recesses in the diffraction-grating layer. In addition, the diffraction-grating layer and the buried layer constitute a diffraction grating. The lower cladding layer, the active layer, and the upper cladding layer constitute a first optical waveguide, the active layer constituting a first core region in the first optical waveguide. The upper cladding layer, the diffraction-grating layer, and the buried layer constitute a second optical waveguide, the diffraction-grating layer constituting a second core region in the second optical waveguide.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: November 6, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Naoya Kono
  • Publication number: 20120020377
    Abstract: A semiconductor laser device includes a lower cladding layer; an active layer disposed on the lower cladding layer; all upper cladding layer disposed on the active layer; a diffraction-grating layer disposed on the upper cladding layer, the diffraction-grating layer including periodic projections and recesses; and a buried layer disposed on the periodic projections and recesses in the diffraction-grating layer. In addition, the diffraction-grating layer and the buried layer constitute a diffraction grating. The lower cladding layer, the active layer, and the upper cladding layer constitute a first optical waveguide, the active layer constituting a first core region in the first optical waveguide. The upper cladding layer, the diffraction-grating layer, and the buried layer constitute a second optical waveguide, the diffraction-grating layer constituting a second core region in the second optical waveguide.
    Type: Application
    Filed: July 7, 2011
    Publication date: January 26, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoya KONO