Patents by Inventor Naoya Sato

Naoya Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090227206
    Abstract: A user information management unit of a terminal generates a management number for respective users. A terminal to terminal communication unit communicates with another terminal through ad hoc communication, acquires a unique user ID set for the other user, and stores the user ID in a friend information storing unit. The data generated in a data generation unit is transmitted to a server from a sending unit along with a destination user ID selected from user IDs stored in a friend information storing unit. A reception unit in the server stores the transmitted data in a data storing unit for each destination user ID. When the server receives a connection request from a terminal, a connecting user information acquisition unit in the server identifies a user ID of a connection origin and a data retrieving unit transmits the data to the terminal by retrieving a data storing unit based on the user ID, indicating the user requested for the connection as a destination.
    Type: Application
    Filed: July 20, 2006
    Publication date: September 10, 2009
    Applicant: Sony Computer Entertainment Inc.
    Inventors: Koji Tada, Naoya Sato, Yukihito Morikawa
  • Publication number: 20090218674
    Abstract: A semiconductor module including: a semiconductor chip, an integrated circuit being formed in the semiconductor chip; a plurality of electrodes electrically connected to the integrated circuit; an insulating film formed on the semiconductor chip and having a plurality of openings positioned corresponding to the plurality of electrodes; and a long elastic protrusion extending on the insulating film. A plurality of interconnects respectively extend from over the electrodes to over the elastic protrusion, directions of the interconnects intersecting an axis AX that is parallel to the extending direction of the elastic protrusion. A plurality of leads are respectively in contact with the interconnects in an area positioned on the elastic protrusion. A cured adhesive maintains a space between a surface of the semiconductor chip on which the elastic protrusion is formed and a surface of the elastic substrate on which the leads are formed.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 3, 2009
    Applicant: Seiko Epson Corporation
    Inventors: Akihito NARITA, Naoya SATO
  • Publication number: 20090218685
    Abstract: A semiconductor module including: a semiconductor chip in which an integrated circuit is formed; an electrode formed on the semiconductor chip and electrically connected to the integrated circuit; an insulating film formed on the semiconductor chip and having an opening positioned corresponding to the electrode; an elastic protrusion disposed on the insulating film, a surface of the elastic protrusion opposite to the insulating film being convexly curved; an interconnect extending from over the electrode to over the elastic protrusion; an elastic substrate on which a lead is formed, the lead being in contact with part of the interconnect positioned on the elastic protrusion; and an adhesive maintaining a space between a surface of the semiconductor chip on which the elastic protrusion is formed and a surface of the elastic substrate on which the lead is formed. The elastic substrate has a first depression formed by elastic deformation.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 3, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Akihito NARITA, Naoya SATO
  • Publication number: 20090208870
    Abstract: A thermal negative type lithographic printing original plate has a photosensitive layer featuring high sensitivity, excellent reproducibility in FM screening, and excellent print durability and chemical resistance at a minute image portion. A photosensitive composition for the photosensitive layer contains an alkali soluble resin having a monomer unit represented by the formula (I), a silane coupling agent represented by the formula (II), an infrared absorber, a radical polymerizable initiator, and a polymerizable compound having an ethylenic double bond and an amount of the silane coupling agent is from 15 to 40% of the photosensitive composition by mass.
    Type: Application
    Filed: November 4, 2008
    Publication date: August 20, 2009
    Inventors: Jun Ozaki, Masaro Nakatsuka, Keiko Yonezawa, Naoya Sato
  • Patent number: 7257892
    Abstract: A method of manufacturing a wiring board, including: providing a resin substrate on which is formed a metal layer including a first layer and a second layer formed on the first layer; forming an interconnecting pattern by etching the metal layer so that the interconnecting pattern includes the patterned first layer and second layer and a part of the first layer remains outside the second layer as a residue of the first layer; electroless plating the interconnecting pattern and the residue of the first layer; and then washing the resin substrate. The washing of the resin substrate is performed by using at least one of an acidic solution used for dissolving and removing the residue of the first layer and a metal deposited on the residue of the first layer by the electroless plating and an alkaline solution used for dissolving the resin substrate to remove an area which supports the residue of the first layer.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: August 21, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Naoya Sato, Akihito Narita, Satoru Akatsuka, Tsutomu Abe
  • Publication number: 20060185163
    Abstract: A method of manufacturing a wiring board, including: providing a resin substrate on which is formed a metal layer including a first layer and a second layer formed on the first layer; forming an interconnecting pattern by etching the metal layer so that the interconnecting pattern includes the patterned first layer and second layer and a part of the first layer remains outside the second layer as a residue of the first layer; electroless plating the interconnecting pattern and the residue of the first layer; and then washing the resin substrate. The washing of the resin substrate is performed by using at least one of an acidic solution used for dissolving and removing the residue of the first layer and a metal deposited on the residue of the first layer by the electroless plating and an alkaline solution used for dissolving the resin substrate to remove an area which supports the residue of the first layer.
    Type: Application
    Filed: February 17, 2006
    Publication date: August 24, 2006
    Inventors: Naoya Sato, Akihito Narita, Satoru Akatsuka, Tsutomu Abe
  • Publication number: 20060013947
    Abstract: A method for manufacturing a wiring board includes electroless plating wiring patterns provided on a base substrate and cleaning the base substrate. The step of cleaning the base substrate includes at least either using an alkaline solvent or using an acid solvent.
    Type: Application
    Filed: July 8, 2005
    Publication date: January 19, 2006
    Inventors: Satoru Akatsuka, Tsutomu Abe, Toshinari Nanba, Naoya Sato, Akihito Narita
  • Publication number: 20040002100
    Abstract: The present invention relates to a method for screening and identifying therapeutic agents or preventive agents for central nervous system diseases which comprises assaying a suppressing effect of a test substance on an expression of a splicing variant transcribed from presenilin-2 gene and to a method for examining central nervous system diseases which comprises detecting an expression of a splicing variant transcribed from presenilin-2 gene in a test sample originated from an animal individual.
    Type: Application
    Filed: April 11, 2003
    Publication date: January 1, 2004
    Applicant: Tanabe Seiyaku Co., Ltd.
    Inventors: Tsutomu Takagi, Naoya Sato, Masaya Tohyama
  • Patent number: 6579679
    Abstract: The present invention relates to a method for screening and identifying therapeutic agents or preventive agents for central nervous system diseases which comprises assaying a suppressing effect of a test substance on an expression of a splicing variant transcribed from presenilin-2 gene and to a method for examining central nervous system diseases which comprises detecting an expression of a splicing variant transcribed from presenilin-2 gene in a test sample originated from an animal individual.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: June 17, 2003
    Assignee: Tanabe Seiyaku Co., Ltd.
    Inventors: Tsutomu Takagi, Naoya Sato, Masaya Tohyama