Abstract: A resistance adjusting circuit including, a reference resistor, a first power source configured to output a first voltage, a first current source configured to output a first current based on a reference current set by using the reference resistor, a first variable resistor, a second current source configured to output a second current obtained by multiplying the first current by a reciprocal ratio, the reciprocal ratio being obtained as a reciprocal number of a ratio of a target resistance of the first variable resistor to a resistance of the reference resistor, and a controller configured to set a resistance of the first variable resistor so that a voltage at a second terminal of the reference resistor and a voltage at a connecting part of the first variable resistor and the second current source become equal to each other.

Abstract: A resistance adjusting circuit including, a reference resistor, a first power source configured to output a first voltage, a first current source configured to output a first current based on a reference current set by using the reference resistor, a first variable resistor, a second current source configured to output a second current obtained by multiplying the first current by a reciprocal ratio, the reciprocal ratio being obtained as a reciprocal number of a ratio of a target resistance of the first variable resistor to a resistance of the reference resistor, and a controller configured to set a resistance of the first variable resistor so that a voltage at a second terminal of the reference resistor and a voltage at a connecting part of the first variable resistor and the second current source become equal to each other.

Abstract: A transmission/reception device includes a transmission circuit configured to apply a delay to at least one of a positive signal and a negative signal of differential signals to be sent to another device, detect a direction of a differential signal skew between the positive signal and the negative signal, to at least one of which the delay is applied, and control the delay in a manner as to reduce the differential signal skew; and a reception circuit configured to apply a delay to at least one of a positive signal and a negative signal of differential signals sent from another transmission/reception device, detect a direction of a differential signal skew between the positive signal and the negative signal, to at least one of which the delay is applied, and control the delay in a manner as to reduce the differential signal skew.

Abstract: A driver device drives a load circuit by a common output signal from a first driver transistor and a second driver transistor. The driver device includes a first pre-driver unit that outputs a first driver control signal to the first driver transistor in response to the input signal; and a second pre-driver unit that outputs a second driver control signal to the second driver transistor in response to the input signal. The first pre-driver unit controls the first driver control signal in such a manner that the first driver control signal is rounded in the vicinity of a threshold of the first driver transistor and is sharply changed in a region exceeding the threshold.

Abstract: A reference current generating circuit includes a generator that generates a reference voltage, a bias generator includes plural transistors of a different conductive types from each other and generates a first bias voltage and a second bias voltage, respectively, a first output transistor and a second output transistor of a different conductive type that outputs a current corresponds to a reference current when the first bias voltage or the second bias voltage is supplied thereto, an input-output unit that one terminal connected between the first output transistor and the second output terminal and the other terminal connected to a load, and supplies current from the first output transistor to the load or from the load to the second output transistor, and a switch that turns on/off the first and the second output transistors based on the output voltage of the input-output unit.

Abstract: A transmission/reception device includes a transmission circuit configured to apply a delay to at least one of a positive signal and a negative signal of differential signals to be sent to another device, detect a direction of a differential signal skew between the positive signal and the negative signal, to at least one of which the delay is applied, and control the delay in a manner as to reduce the differential signal skew; and a reception circuit configured to apply a delay to at least one of a positive signal and a negative signal of differential signals sent from another transmission/reception device, detect a direction of a differential signal skew between the positive signal and the negative signal, to at least one of which the delay is applied, and control the delay in a manner as to reduce the differential signal skew.

Abstract: According to an aspect of the invention, a reference signal generating circuit includes a band gap reference main unit that includes a first cascode current mirror unit having a plurality of first conductive-type transistors; a second cascode current mirror unit having a plurality of second conductive-type transistors; a reference unit that uses a band gap to generate a reference signal; a first bias voltage generating unit that generates a bias voltage of the second cascode current mirror unit; a second bias voltage generating unit that generates a bias voltage of the first cascode current mirror unit; and an output unit that generates a reference signal based upon an output of the band gap reference main unit to generate and outputs the reference signal, wherein the second cascode current mirror unit is connected between the first cascode current mirror unit and the reference unit.

Abstract: A reference current generating circuit includes a generator that generates a reference voltage, a bias generator includes plural transistors of a different conductive types from each other and generates a first bias voltage and a second bias voltage, respectively, a first output transistor and a second output transistor of a different conductive type that outputs a current corresponds to a reference current when the first bias voltage or the second bias voltage is supplied thereto, an input-output unit that one terminal connected between the first output transistor and the second output terminal and the other terminal connected to a load, and supplies current from the first output transistor to the load or from the load to the second output transistor, and a switch that turns on/off the first and the second output transistors based on the output voltage of the input-output unit.

Abstract: A driver device drives a load circuit by a common output signal from a first driver transistor and a second driver transistor. The driver device includes a first pre-driver unit that outputs a first driver control signal to the first driver transistor in response to the input signal; and a second pre-driver unit that outputs a second driver control signal to the second driver transistor in response to the input signal. The first pre-driver unit controls the first driver control signal in such a manner that the first driver control signal is rounded in the vicinity of a threshold of the first driver transistor and is sharply changed in a region exceeding the threshold.

Abstract: A variable delay circuit includes: a first delay section that changes a first drive capability or a first capacity load, receives the reference signals, and generates a first delayed signal by giving a first delay to the reference signal; a second delay section that changes a second drive capability or a second capacity load of the second delay section, receives the reference signal, and generates a second delayed signal by giving a second delay to the reference signal; a first capacity load setting section that sets at least one of the first capacity load and the second capacity load; a first phase comparing section that compares a first phase of the first delayed signal with a second phase of the second delayed signal; and a drive capability setting section that controls the first drive capability and the second drive capability.

Abstract: According to an aspect of the invention, a reference signal generating circuit includes a band gap reference main unit that includes a first cascode current mirror unit having a plurality of first conductive-type transistors; a second cascode current mirror unit having a plurality of second conductive-type transistors; a reference unit that uses a band gap to generate a reference signal; a first bias voltage generating unit that generates a bias voltage of the second cascode current mirror unit; a second bias voltage generating unit that generates a bias voltage of the first cascode current mirror unit; and an output unit that generates a reference signal based upon an output of the band gap reference main unit to generate and outputs the reference signal, wherein the second cascode current mirror unit is connected between the first cascode current mirror unit and the reference unit.

Abstract: A variable delay circuit includes: a first delay section that changes a first drive capability or a first capacity load, receives the reference signals, and generates a first delayed signal by giving a first delay to the reference signal; a second delay section that changes a second drive capability or a second capacity load of the second delay section, receives the reference signal, and generates a second delayed signal by giving a second delay to the reference signal; a first capacity load setting section that sets at least one of the first capacity load and the second capacity load; a first phase comparing section that compares a first phase of the first delayed signal with a second phase of the second delayed signal; and a drive capability setting section that controls the first drive capability and the second drive capability.