Patents by Inventor Naoya Tamaki

Naoya Tamaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130234304
    Abstract: When a material of an organic substrate is glass epoxy and a material of a semiconductor chip is silicon or gallium arsenide, a substrate warp sometimes occurs because of a difference between thermal expansion coefficients of the materials. The shape of the antenna formed on the organic substrate due to such a substrate warp, so that the characteristics of the antenna are sometimes shifted from desired values. An antenna is provided on the substrate on which a semiconductor chip is mounted, and is covered with a resin. The resin has enough hardness to suppress the warp caused by joining the semiconductor chip and the substrate and a transformation of the antenna. By changing a connection relation of adjustment vias after the manufacture of the semiconductor device, the characteristic of the antenna can be changed.
    Type: Application
    Filed: March 2, 2013
    Publication date: September 12, 2013
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Naoya Tamaki
  • Patent number: 7504837
    Abstract: The characteristics of an object are measured using an electrical characteristics measurement device in which a probe includes a signal terminal, a ground terminal, and a variable resistance element is connected via a coaxial cable to a measuring instrument. The calibration of the probe entails adjusting the resistance value of the variable resistance element, setting the impedance of the distal end vicinity of the probe essentially to zero, and establishing a match with the coaxial cable and measuring instrument. When the electrical characteristics of the object are measured, the resistance value of the variable resistance element is varied in accordance with the impedance created by the side of the circuit containing the measurement object as viewed from the contact between the object and the signal terminal and ground terminal, and the input impedance of the probe is set to a value that does not affect the operation of the object.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: March 17, 2009
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Eiji Hankui
  • Publication number: 20070182428
    Abstract: The electrical characteristics of a measurement object 8 are measured using an electrical characteristics measurement device in which a probe 1 comprising a signal terminal 2, a ground terminal 3, and a variable resistance element 4 is connected via a coaxial cable 5 to a measuring instrument 6. The calibration of the probe 1 in such a configuration entails adjusting the resistance value of the variable resistance element, setting the impedance of the distal end vicinity of the probe 1 essentially to 0, and establishing a match with the coaxial cable 5 and measuring instrument 6.
    Type: Application
    Filed: November 17, 2004
    Publication date: August 9, 2007
    Inventors: Naoya Tamaki, Eiji Hankui
  • Patent number: 6882542
    Abstract: An electronic apparatus comprises a function module having a multilayer wiring unit including a first signal wiring corresponding to an internal layer wiring, a first signal via, a first reference potential wiring, a first signal pad to which the first signal wiring is connected through the first signal via, a first reference potential pad that surrounds the periphery of the first signal pad and to which the first reference potential wiring is connected, and a first reference potential connected to the first reference potential pad; a inultilayer circuit board; a first conductor; and a second conductor.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: April 19, 2005
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda, Toshihide Kuriyama, Masamoto Tago
  • Patent number: 6847276
    Abstract: An object of the present invention is to provide a radio frequency integrated circuit module that is less susceptible to the electromagnetic influence and that is not degraded in electric connection. The radio frequency circuit module of the present invention including circuit elements mounted on a multi-layer circuit substrate having dielectric layers is characterized in that an exposed connection portion is provided by removing a part of the dielectric, and a strip line connected to said circuit elements and a co-axial line for transmitting a radio frequency signal from/to said strip line are connected together in a bottom portion of said exposed connection portion so as to be rectilinear in a three dimensional way.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: January 25, 2005
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda
  • Patent number: 6842093
    Abstract: An object of the present invention is to provide a radio frequency integrated circuit module that is less susceptible to the electromagnetic influence and that is not degraded in electric connection. The radio frequency circuit module of the present invention including circuit elements mounted on a multi-layer circuit substrate having dielectric layers is characterized in that an exposed connection portion is provided by removing a part of the dielectric, and a strip line connected to said circuit elements and a co-axial line for transmitting a radio frequency signal from/to said strip line are connected together in a bottom portion of said exposed connection portion so as to be rectilinear in a three dimensional way.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: January 11, 2005
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda
  • Patent number: 6750648
    Abstract: The present invention provides a device for detecting a magnetic field comprising: a dielectric body; an electrically conductive pattern; and an electrically conductive ground region. The electrically conductive pattern so extends in the dielectric body as to form a dielectric looped face at least partially surrounded by the electrically conductive pattern, and the electrically conductive pattern having a first end electrically connected to an external electrically conductive line and a second end. The electrically conductive ground region is formed in the dielectric body. The electrically conductive ground region is electrically connected to the second end of the electrically conductive pattern and is electrically isolated from other parts of the electrically conductive pattern than the second end, so that the electrically conductive ground region serves as a ground to the electrically conductive pattern.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: June 15, 2004
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda
  • Publication number: 20040057220
    Abstract: An electronic apparatus comprises a function module having a multilayer wiring unit including a first signal wiring corresponding to an internal layer wiring, a first signal via, a first reference potential wiring, a first signal pad to which the first signal wiring is connected through the first signal via, a first reference potential pad that surrounds the periphery of the first signal pad and to which the first reference potential wiring is connected, and a first reference potential via connected to the first reference potential pad; a multilayer circuit board including a second signal wiring corresponding to an internal layer wiring, a second signal via, a second reference potential wiring, a second signal pad to which one end of the second signal wiring is connected through the second signal via, a second reference potential pad that surrounds the periphery of the second signal pad and to which one end of the second reference potential wiring is connected, a second reference potential via connected to th
    Type: Application
    Filed: September 17, 2003
    Publication date: March 25, 2004
    Applicant: NEC CORPORATION
    Inventors: Naoya Tamaki, Norio Masuda, Toshihide Kuriyama, Masamoto Tago
  • Patent number: 6661318
    Abstract: An object of the present invention is to provide a radio frequency integrated circuit module that is less susceptible to the electromagnetic influence and that is not degraded in electric connection. The radio frequency circuit module of the present invention including circuit elements mounted on a multi-layer circuit substrate having dielectric layers is characterized in that an exposed connection portion is provided by removing a part of the dielectric, and a strip line connected to said circuit elements and a co-axial line for transmitting a radio frequency signal from/to said strip line are connected together in a bottom portion of said exposed connection portion so as to be rectilinear in a three dimensional way.
    Type: Grant
    Filed: May 8, 2001
    Date of Patent: December 9, 2003
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda
  • Patent number: 6661243
    Abstract: A semiconductor device evaluation apparatus for correctly measuring emission noise of a semiconductor device includes: an electromagnetic field measurement unit for measuring a two-dimensional electromagnetic field distribution in a plane parallel to an upper surface of a semiconductor device; a distribution image generation unit for not only extracting a distribution of an electromagnetic field higher than a threshold value determined in advance from the electromagnetic field distribution of the semiconductor device measured by the electromagnetic field measurement unit but converting the extracted electromagnetic field distribution to a distribution image in a two-dimensional plane; an image collation unit for collating the distribution image generated by the distribution image generation unit with a projected image, generated in advance, of an interconnect and a lead frame of the semiconductor device; and an emission source specifying unit for specifying an interconnect or a lead frame whose images are sup
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: December 9, 2003
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda
  • Publication number: 20030218515
    Abstract: An object of the present invention is to provide a radio frequency integrated circuit module that is less susceptible to the electromagnetic influence and that is not degraded in electric connection. The radio frequency circuit module of the present invention including circuit elements mounted on a multi-layer circuit substrate having dielectric layers is characterized in that an exposed connection portion is provided by removing a part of the dielectric, and a strip line connected to said circuit elements and a co-axial line for transmitting a radio frequency signal from/to said strip line are connected together in a bottom portion of said exposed connection portion so as to be rectilinear in a three dimensional way.
    Type: Application
    Filed: June 13, 2003
    Publication date: November 27, 2003
    Applicant: NEC CORPORATION
    Inventors: Naoya Tamaki, Norio Masuda
  • Publication number: 20030206084
    Abstract: An object of the present invention is to provide a radio frequency integrated circuit module that is less susceptible to the electromagnetic influence and that is not degraded in electric connection. The radio frequency circuit module of the present invention including circuit elements mounted on a multi-layer circuit substrate having dielectric layers is characterized in that an exposed connection portion is provided by removing a part of the dielectric, and a strip line connected to said circuit elements and a co-axial line for transmitting a radio frequency signal from/to said strip line are connected together in a bottom portion of said exposed connection portion so as to be rectilinear in a three dimensional way.
    Type: Application
    Filed: June 13, 2003
    Publication date: November 6, 2003
    Applicant: NEC CORPORATION
    Inventors: Naoya Tamaki, Norio Masuda
  • Patent number: 6396264
    Abstract: A triplate stripline on a multilayer circuit board includes an inner conductor sandwiched between two ground patterns having a finite pattern width that is 10 times the pattern width of said inner conductor or less. The two ground patterns are short-circuited on opposite transverse ends thereof by a plurality of vias disposed in a longitudinal direction which is a signal transmitting direction of the stripline. An adjacent stripline is of the same structure as the triplate stripline. Each of the striplines has a cross-sectional shape in which one inner conductor is surrounded by the two ground patterns and the vias on the opposite sides. The inner conductor is thus prevented from suffering ambient electromagnetic noise and electromagnetic interference such as crosstalk or the like.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: May 28, 2002
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda
  • Publication number: 20020017912
    Abstract: A semiconductor device evaluation apparatus for correctly measuring emission noise of a semiconductor device includes: an electromagnetic field measurement unit for measuring a two-dimensional electromagnetic field distribution in a plane parallel to an upper surface of a semiconductor device; a distribution image generation unit for not only extracting a distribution of an electromagnetic field higher than a threshold value determined in advance from the electromagnetic field distribution of the semiconductor device measured by the electromagnetic field measurement unit but converting the extracted electromagnetic field distribution to a distribution image in a two-dimensional plane; an image collation unit for collating the distribution image generated by the distribution image generation unit with a projected image, generated in advance, of an interconnect and a lead frame of the semiconductor device; and an emission source specifying unit for specifying an interconnect or a lead frame whose images are sup
    Type: Application
    Filed: September 12, 2001
    Publication date: February 14, 2002
    Applicant: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda
  • Publication number: 20010042907
    Abstract: An object of the present invention is to provide a radio frequency integrated circuit module that is less susceptible to the electromagnetic influence and that is not degraded in electric connection. The radio frequency circuit module of the present invention including circuit elements mounted on a multi-layer circuit substrate having dielectric layers is characterized in that an exposed connection portion is provided by removing a part of the dielectric, and a strip line connected to said circuit elements and a co-axial line for transmitting a radio frequency signal from/to said strip line are connected together in a bottom portion of said exposed connection portion so as to be rectilinear in a three dimensional way.
    Type: Application
    Filed: May 8, 2001
    Publication date: November 22, 2001
    Applicant: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda
  • Patent number: 6320376
    Abstract: A magnetic field sensor has a first conductor, a first insulating film, a second conductor, a second insulating film and a third conductor. The first conductor is composed of a “C-shaped” portion, which is formed in a C-like shape, and a linear portion, which is connected to one side of the “C-shaped” portion which is opposite to a gap of the “C-shaped” portion. The first insulating film is formed on the first conductor and has a hole in a predetermined position. The second conductor is formed in a ladle-like shape, and is formed on the first insulating film such that its one side corresponding to the front end of the ladle overlaps with a straight line, through which an outer edge of one end and an outer edge of the other end of the “C-shaped” portion.
    Type: Grant
    Filed: December 2, 1999
    Date of Patent: November 20, 2001
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda, Masahiro Yamaguchi, Ken-Ichi Arai
  • Patent number: 6300779
    Abstract: A semiconductor device evaluation apparatus for correctly measuring emission noise of a semiconductor device includes: an electromagnetic field measurement unit for measuring a two-dimensional electromagnetic field distribution in a plane parallel to an upper surface of a semiconductor device; a distribution image generation unit for not only extracting a distribution of an electromagnetic field higher than a threshold value determined in advance from the electromagnetic field distribution of the semiconductor device measured by the electromagnetic field measurement unit but converting the extracted electromagnetic field distribution to a distribution image in a two-dimensional plane; an image collation unit for collating the distribution image generated by the distribution image generation unit with a projected image, generated in advance, of an interconnect and a lead frame of the semiconductor device; and an emission source specifying unit for specifying an interconnect or a lead frame whose images are sup
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: October 9, 2001
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda
  • Patent number: 6281697
    Abstract: A semiconductor device evaluation apparatus is provided with a test board. A print wiring is provided at a first surface of the test board on which a semiconductor device is mounted. A terminal of the semiconductor device is connected to the print wiring. A power circuit is provided at a second surface opposite to the first surface of the test board. The power circuit is connected to the print wiring and actuates the semiconductor device. The apparatus is also provided with a magnetic field detector arranged above the print wiring and detects a magnetic field generated from the print wiring. Further, the apparatus is provided with a current detector detecting a value of current carried through the print wiring based on the magnitude of the magnetic field detected by the magnetic field detector.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: August 28, 2001
    Assignee: NEC Corporation
    Inventors: Norio Masuda, Naoya Tamaki
  • Patent number: 6163150
    Abstract: A magnetic field sensor is provided which can be easily downsized and has a capability to detect a magnetic field in the Ghz band with a high space resolution and to reduce a voltage induced by an electric field. The magnetic field sensor is composed of a first layer, a second layer and a third layer. The first layer is provided with a straight-lined conductor pattern disposed in a perpendicular manner to a mid-point of another straight-lined conductor pattern being the longest among J-shaped conductor patterns. The third layer has the same conductor pattern as the first layer. The second layer has a ladle-shaped conductor pattern disposed along the center of the width of the conductor pattern of the first layer and third layer and an L-shaped conductor pattern disposed so as to form a loop face to face with the bending section of the J-shaped conductor pattern.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: December 19, 2000
    Assignee: NEC Corporation
    Inventors: Naoya Tamaki, Norio Masuda, Masahiro Yamaguchi, Kenichi Arai
  • Patent number: 6144196
    Abstract: A magnetic measuring apparatus measures, at a high spatial resolution, a magnetic field generated by a current flowing in one of a plurality of highly packed parallel wires on a printed-circuit board. The magnetic measuring apparatus includes a magnetic field detector for detecting a magnetic field generated by a current flowing in one of a plurality of parallel wires, a measuring unit for measuring a magnetic field intensity based on an output signal from the magnetic field detector, an input unit for entering a pitch of the parallel wires and a spatial resolution characteristic of the magnetic field detector, a processor for calculating a height of the magnetic field detector from the one of the parallel wires based on the pitch of the parallel wires and the spatial resolution characteristic, and a scanning device for scanning the magnetic field detector into a position determined by the processor.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: November 7, 2000
    Assignee: NEC Corporation
    Inventor: Naoya Tamaki