Patents by Inventor Naoya Tomoda

Naoya Tomoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11904869
    Abstract: A monitoring system includes an arithmetic processor. The arithmetic processor receives captured image information representing a captured image obtained by capturing an image of a subject and generates notification information representing a particular notification content depending on a condition of the subject. The arithmetic processor includes a first arithmetic processor and a second arithmetic processor. The first arithmetic processor obtains a condition quantity by quantifying the condition of the subject by reference to the captured image information and based on a parameter about a human activity status. The second arithmetic processor selects, according to the condition quantity, the particular notification content from contents of notification classified into N stages, where N is an integer equal to or greater than three.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: February 20, 2024
    Assignee: Nuvoton Technology Corporation Japan
    Inventors: Yasuyuki Shimizu, Seiji Matsui, Naoya Tomoda, Fumihito Nakajima, Tomohiko Kanemitsu, Takuya Asano, Norihiro Imanaka, Seigo Suguta, Masanori Hirofuji
  • Publication number: 20220234594
    Abstract: A monitoring system includes an arithmetic processor. The arithmetic processor receives captured image information representing a captured image obtained by capturing an image of a subject and generates notification information representing a particular notification content depending on a condition of the subject. The arithmetic processor includes a first arithmetic processor and a second arithmetic processor. The first arithmetic processor obtains a condition quantity by quantifying the condition of the subject by reference to the captured image information and based on a parameter about a human activity status. The second arithmetic processor selects, according to the condition quantity, the particular notification content from contents of notification classified into N stages, where N is an integer equal to or greater than three.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Inventors: Yasuyuki SHIMIZU, Seiji MATSUI, Naoya TOMODA, Fumihito NAKAJIMA, Tomohiko KANEMITSU, Takuya ASANO, Norihiro IMANAKA, Seigo SUGUTA, Masanori HIROFUJI
  • Publication number: 20140159061
    Abstract: A protective element includes a semiconductor substrate, connecting electrodes, bottom electrodes, and a protection circuit. The connecting electrodes are provided on a mount surface of the semiconductor substrate on which a light-emitting element for flip-chip mounting is mounted so as to be each connected to an electrode of the light-emitting element. The protection circuit is provided in the semiconductor substrate so as to be connected through the connecting electrodes to the light-emitting element. The bottom electrodes are provided on a surface of the semiconductor substrate opposite to the mount surface, are each connected to a corresponding one of the connecting electrodes, and are configured so as to be each connected to an electrode on the mounting base.
    Type: Application
    Filed: August 24, 2012
    Publication date: June 12, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Naoya Tomoda, Yoshiyuki Norimitsu, Koichi Nakahara