Patents by Inventor Naoya Torii
Naoya Torii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11939881Abstract: A platform of a gas turbine rotor blade according to one embodiment includes a groove portion recessed from an end surface on a trailing edge side toward a leading edge side. A bottom portion of the groove portion overlaps at least a blade-shaped portion when viewed from a radial direction.Type: GrantFiled: March 23, 2023Date of Patent: March 26, 2024Assignee: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Ryo Murata, Yuji Komagome, Naoya Tatsumi, Hiroki Kitada, Shunsuke Torii
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Patent number: 10686768Abstract: In a profile data delivery control apparatus, a storage unit stores therein a public key and a private key. A control unit obtains profile data including the identification information of a service provided using a server, and when the profile data satisfies a prescribed validity condition, attaches a signature to the profile data using the private key. The control unit embeds the public key to be used to verify the signature, in a client application that causes a client to perform an authentication process based on the profile data, and delivers the client application with the public key embedded.Type: GrantFiled: May 10, 2017Date of Patent: June 16, 2020Assignee: FUJITSU LIMITEDInventors: Junji Takagi, Ikuya Morikawa, Takao Ogura, Dai Yamamoto, Yumi Sakemi, Naoya Torii
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Patent number: 10270768Abstract: A communication system includes a first communication device that determines, using identification information on a frame, whether to receive the frame, and a second communication device that belongs to a network identical to the first communication device. A report frame includes a detection of an attack on the network and target identification information that is identification information included in a frame used to perform the attack. When the first communication device receives a report frame from the second communication device, the first communication device sets the frame including the target identification information to be an authentication processing target. Upon transmitting a transmission frame set to be the authentication processing target, the first communication device transmits authentication information generated from the transmission frame along with the transmission frame.Type: GrantFiled: January 11, 2017Date of Patent: April 23, 2019Assignee: FUJITSU LIMITEDInventors: Jun Yajima, Takayuki Hasebe, Naoya Torii, Tsutomu Matsumoto
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Publication number: 20170366525Abstract: In a profile data delivery control apparatus, a storage unit stores therein a public key and a private key. A control unit obtains profile data including the identification information of a service provided using a server, and when the profile data satisfies a prescribed validity condition, attaches a signature to the profile data using the private key. The control unit embeds the public key to be used to verify the signature, in a client application that causes a client to perform an authentication process based on the profile data, and delivers the client application with the public key embedded.Type: ApplicationFiled: May 10, 2017Publication date: December 21, 2017Applicant: FUJITSU LIMITEDInventors: Junji TAKAGI, Ikuya Morikawa, Takao Ogura, Dai YAMAMOTO, Yumi Sakemi, Naoya Torii
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Patent number: 9793895Abstract: An electronic circuit includes: a first logic circuit coupled to a first input line and a first output line; a second logic circuit coupled to a second input line and a second output line; a first line pattern coupled to the first output line and including an input line different from the second input line; and a second line pattern coupled to the second output line and different from the first input line, wherein at least a part of the first output line, the first line pattern, the second output line, or the second line pattern has a folded shape or a circular shape.Type: GrantFiled: December 12, 2016Date of Patent: October 17, 2017Assignee: FUJITSU LIMITEDInventors: Dai Yamamoto, Naoya Torii, Ikuya Morikawa
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Publication number: 20170208065Abstract: A communication system includes a first communication device that determines, using identification information on a frame, whether to receive the frame, and a second communication device that belongs to a network identical to the first communication device. A report frame includes a detection of an attack on the network and target identification information that is identification information included in a frame used to perform the attack. When the first communication device receives a report frame from the second communication device, the first communication device sets the frame including the target identification information to be an authentication processing target. Upon transmitting a transmission frame set to be the authentication processing target, the first communication device transmits authentication information generated from the transmission frame along with the transmission frame.Type: ApplicationFiled: January 11, 2017Publication date: July 20, 2017Applicant: FUJITSU LIMITEDInventors: Jun Yajima, Takayuki Hasebe, Naoya Torii, Tsutomu Matsumoto
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Publication number: 20170187381Abstract: An electronic circuit includes: a first logic circuit coupled to a first input line and a first output line; a second logic circuit coupled to a second input line and a second output line; a first line pattern coupled to the first output line and including an input line different from the second input line; and a second line pattern coupled to the second output line and different from the first input line, wherein at least a part of the first output line, the first line pattern, the second output line, or the second line pattern has a folded shape or a circular shape.Type: ApplicationFiled: December 12, 2016Publication date: June 29, 2017Applicant: FUJITSU LIMITEDInventors: Dai YAMAMOTO, Naoya Torii, Ikuya Morikawa
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Publication number: 20160246994Abstract: An information collection apparatus, which collects information from an information apparatus on a network and stores the collected information in a database, includes a processor and a memory. The memory stores a program that, when executed by the processor, causes the information collection apparatus to receive a use request for use of information stored in the database from a terminal apparatus, determine whether to collect the information that is the target of the use request from the information apparatus via the terminal apparatus, return a collection request to the terminal apparatus for collection of the information from the information apparatus and transmission of the collected information to a predetermined destination, in response to determining to collect the information, and store the information collected from the information apparatus and transmitted to the predetermined destination by the terminal apparatus.Type: ApplicationFiled: February 5, 2016Publication date: August 25, 2016Applicant: FUJITSU LIMITEDInventors: Takao OGURA, Ikuya MORIKAWA, Junji TAKAGI, Naoya TORII
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Patent number: 8078661Abstract: A multiple-word multiplication-accumulation circuit suitable for use with a single-port memory. The circuit is composed of a multiplication-accumulation (MAC) operator and surrounding registers. The MAC operator has multiplicand and multiplier input ports with different bit widths to calculate a sum of products of multiple-word data read out of a memory. The registers serve as buffer storage of multiple-word data to be supplied to individual input ports of the MAC operator. The amount of data supplied to the MAC operator in each clock cycle is adjusted such that total amount of data consumed and produced by the MAC operator in one clock cycle will be equal to or smaller than the maximum amount of data that the memory can transfer in one clock cycle. This feature enables the use of a bandwidth-limited single-port memory, without causing adverse effect on the efficiency of MAC operator usage.Type: GrantFiled: July 26, 2004Date of Patent: December 13, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Kenji Mukaida, Masahiko Takenaka, Naoya Torii, Shoichi Masui
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Patent number: 7792893Abstract: A method for calculating a conversion parameter of the Montgomery modular multiplication to improve the efficiency of software installation, comprising a first step for calculating H0=2v×R (mod n) (where v is an integer, v?1, and (m×k)/v is an integer), a second step for calculating Hp=2v×2^p×R (mod n) from H0=2v×R (mod n) by repeating Hi=REDC(Hi?1, Hi?1)n with respect to i=1, 2, . . . , p (where p represents an integer satisfying the condition 2p?(m×k)/v>2p?1, REDC represents the Montgomery modular multiplication REDC(a, b)n=a×b×R?1 (mod n), and x^i represents exponential computation xi); and a third step for calculating Hp=R2 (mod n) by calculating Hp=REDC(Hp, g)n with respect to Hp obtained in the second step when 2p>(m×k)/v (where g=2k×E(p,m,k), E(p, m, k)=2×m?(v×2p)/k) and finally outputting Hp as R2 (mod n).Type: GrantFiled: September 21, 2005Date of Patent: September 7, 2010Assignee: Fujitsu LimitedInventors: Kouichi Itoh, Masahiko Takenaka, Naoya Torii
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Patent number: 7639808Abstract: An elliptic curve cryptosystem apparatus performing an elliptic curve cryptosystem process has a coordinate transforming unit for transforming coordinates (X:Y:Z) on a point P on an elliptic curve over a finite field GF(p^m) to coordinates (r1×(X?s1):r2×(Y?s2):r3×(Z?s3)) (where, p is a prime number, m is an integer not less than 1, r1, r2 and r3 are integers not less than 1 and not larger than (p?1), s1, s2 and s3 are integer not less than 0 and not larger than (p?1), and a code “^” represents power), and a scalar multiplication operating unit for performing scalar multiplication on the point on the elliptic curve transformed by the coordinate transforming unit, wherein at least one of the parameters s1, s2 and s3 has a value other than 0. The apparatus can perform the scalar multiplication in the elliptic curve cryptosystem, with resistance to side channel attacks.Type: GrantFiled: December 16, 2005Date of Patent: December 29, 2009Assignee: Fujitsu LimitedInventors: Tetsuya Izu, Kouichi Itoh, Masahiko Takenaka, Naoya Torii
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Patent number: 7536011Abstract: An encryption device performs elliptic curve encryption using a secret key. The encryption device includes an operation unit for performing scalar multiplication of a point on an elliptic curve a storage unit having a plurality of data storing areas and a determiner unit for determining, in accordance with a bit sequence of a given value (d) and with a random value (RNG), an address of one of the plurality of data storage areas that is to be coupled to the operation means for each scalar multiplication.Type: GrantFiled: January 31, 2005Date of Patent: May 19, 2009Assignee: Fujitsu LimitedInventors: Masahiko Takenaka, Tetsuya Izu, Kouichi Itoh, Naoya Torii
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Patent number: 7403965Abstract: An arithmetic device for Montgomery modular multiplication which quickly calculates a parameter ND, the parameter ND satisfying R×R?1?N×ND=1 for an integer N and a radix R that is coprime to and greater than N, with a large number of effective lower bits. The device comprises an ND generator, a multiplication-accumulation (MAC) operator, and a sum data store. The ND generator produces effective lower bits of ND at a rate of k bits per clock cycle, with reference to lower k bits of a variable S, as well as to lower k bits of an odd positive integer N. The MAC operator multiplies the produced k-bit ND value by N and adds the resulting product to S. The sum data store stores the variable S, which is updated with the output of the MAC operator, with its bits shifted right by k bits, for use by the ND generator in the subsequent clock cycle.Type: GrantFiled: July 13, 2004Date of Patent: July 22, 2008Assignee: Fujitsu LimitedInventors: Kenji Mukaida, Masahiko Takenaka, Naoya Torii, Shoichi Masui
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Patent number: 7386130Abstract: The encryption device includes a random number generator for generating a random number; and a first selector for selecting one of q fixed values in response to the random number, a second selector for selecting one set of q sets of fixed S-box tables in response to the random number. An XOR XORs an input with an XOR of a key with the fixed value. A nonlinear transform transforms an input nonlinearly in accordance with the selected set of fixed S-box tables. Another encryption device includes a plurality of encrypting units coupled in parallel, and a selector for selecting one of the plurality of encrypting units in response to the random number. The masking with the fixed values improves the processing speed and reduces the required RAM area.Type: GrantFiled: December 28, 2001Date of Patent: June 10, 2008Assignee: Fujitsu LimitedInventors: Koichi Ito, Masahiko Takenaka, Naoya Torii
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Publication number: 20070177721Abstract: An encryption device (10) for performing elliptic encryption processing with a private key, includes: randomizing means (16) for setting, into an initial elliptic point V0, an elliptic point R on an elliptic curve that is generated in accordance with a random value; operation means (20) for performing a first operation of summing the initial elliptic point V0 and a scalar multiple of a particular input elliptic point A on the elliptic curve, V1=V0+dA, in accordance with a bit sequence of a particular scalar value d for the elliptic encryption processing; de-randomizing means (22) for performing a second operation of subtracting the initial elliptic point V0 from the sum V1 determined by the first operation, V=V1?V0; and means (24) for providing, as an output, the elliptic point V determined by the de-randomization unit.Type: ApplicationFiled: November 15, 2005Publication date: August 2, 2007Applicant: FUJITSU LIMITEDInventors: Kouichi Itoh, Tetsuya Izu, Masahiko Takenaka, Naoya Torii
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Patent number: 7158638Abstract: An encryption circuit that reduces a scale of circuit and can achieve a certain level of high-speed processing in the implementation of the AES block cipher.Type: GrantFiled: January 3, 2002Date of Patent: January 2, 2007Assignee: Fujitsu LimitedInventors: Souichi Okada, Naoya Torii, Tomohiro Hayashi, Chikahiro Deguchi, Yumi Fujiwara
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Publication number: 20060235921Abstract: A method for calculating a conversion parameter of the Montgomery modular multiplication to improve the efficiency of software installation, comprising a first step for calculating H0=2v×R (mod n) (where v is an integer, v?1, and (m×k)/v is an integer), a second step for calculating Hp=2v×2p×R (mod n) from H0=2v×R (mod n) by repeating Hi=REDC(Hi-1, Hi-1)n with respect to i=1, 2, . . . , p (where p represents an integer satisfying the condition 2p?(m×k)/v>2p?1, REDC represents the Montgomery modular multiplication REDC(a, b)n=a×b×R?1 (mod n), and xˆi represents exponential computation xi); and a third step for calculating Hp=R2 (mod n) by calculating Hp=REDC(Hp, g)n with respect to Hp obtained in the second step when 2p>(m×k)/v (where g=2k×E(p,m,k), E(p, m, k)=2×m?(v×2p)/k) and finally outputting Hp as R2 (mod n).Type: ApplicationFiled: September 21, 2005Publication date: October 19, 2006Applicant: FUJITSU LIMITEDInventors: Kouichi Itoh, Masahiko Takenaka, Naoya Torii
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Patent number: 7065788Abstract: Ciphertext X and a constant C having relationships C>p and C>q with respect to secret keys p and q are input, and correction values C?dp and C?dq (dp=d mod (p?1), dq=d mod (q?1)) are obtained. Then, the ciphertext X is multiplied by the constant C. A remainder operation using the secret key p or q as a remainder value is conducted with respect to the multiplication result. A modular exponentiation operation based on a Chinese remainder theorem is conducted with respect to the remainder operation result, and a correction operation using a correction value C?dp or C?dq is conducted. Thereafter, plaintext Y before being encrypted is calculated.Type: GrantFiled: October 24, 2002Date of Patent: June 20, 2006Assignee: Fujitsu LimitedInventors: Jun Yajima, Kouichi Itoh, Masahiko Takenaka, Naoya Torii
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Publication number: 20060093137Abstract: An elliptic curve cryptosystem apparatus performing an elliptic curve cryptosystem process has a coordinate transforming unit for transforming coordinates (X:Y:Z) on a point P on an elliptic curve over a finite field GF(pˆm) to coordinates (r1×(X?s1):r2×(Y?s2):r3×(Z?s3)) (where, p is a prime number, m is an integer not less than 1, r1, r2 and r3 are integers not less than 1 and not larger than (p?1), s1, s2 and s3 are integer not less than 0 and not larger than (p?1), and a code “ˆ” represents power), and a scalar multiplication operating unit for performing scalar multiplication on the point on the elliptic curve transformed by the coordinate transforming unit, wherein at least one of the parameters s1, s2 and s3 has a value other than 0. The apparatus can perform the scalar multiplication in the elliptic curve cryptosystem, with resistance to side channel attacks.Type: ApplicationFiled: December 16, 2005Publication date: May 4, 2006Applicant: FUJITSU LIMITEDInventors: Tetsuya Izu, Kouichi Itoh, Masahiko Takenaka, Naoya Torii
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Patent number: 6956951Abstract: Intermediate data ai, bi, ci, and di are prepared by an intermediate data preparing equipment 4 from a cryptographic key through a nonlinear type function operation and the like, an extended key preparing equipment 5 selects a [Xr], b [Yr], c [Zr], and d [Wr] corresponding to the number of stages r from the intermediate data, and rearranges the data as well as conducts that of bit operation to prepare extended keys, whereby an extended key preparing apparatus by which an extended key required in the case where common key cryptosystem is applied can be safely prepared at a high speed, a process for preparing such an extended key, and a recording medium used therefor are provided.Type: GrantFiled: March 20, 2001Date of Patent: October 18, 2005Assignee: Fujitsu LimitedInventors: Takeshi Shimoyama, Koichi Ito, Masahiko Takenaka, Naoya Torii, Jun Yajima, Hitoshi Yanami, Kazuhiro Yokoyama