Abstract: A radar transmitter includes a signal generator that generates a plurality of signals, each signal corresponding to respective one of a plurality of transmission branches, a modulator that modulates each of the plurality of generated signals, a frequency shifter that provides one of a plurality of frequency shifts respectively to one of the plurality of modulated signals, where each of the plurality of frequency shifts has corresponding one of a plurality of frequency shift amounts, each frequency shift amount being a multiple of a predetermined period, and where each of the plurality of frequency shift amounts respectively corresponding to the plurality of transmission branches differ from each other, and a radio transmitter that transmits a plurality of frequency shifted signals as radar signals.

Abstract: A transmission system is provided with a pulse sequence generator that generates a pulse sequence including Golay code or Spano code, a ?/2-BPSK modulator that applies ?/2-BPSK modulation to the pulse sequence generated by the pulse sequence generator, and a phase rotator that provides phase rotation for every pulse for output of the ?/2-BPSK modulator and a reception system is provided with a phase rotator that provides a phase opposite to a phase provided by the phase rotator of the transmission system and a correlator that performs correlation calculation for output of the phase rotator, based on the output of the ?/2-BPSK modulator.

Abstract: A wireless base station apparatus includes an interference report receiver configured to receive interference reports transmitted on a shared radio resource from a plurality of wireless terminals that are present in a plurality of adjacent cells that are adjacent to a target cell, the shared radio resource being comprised of a plurality of carriers and being shared between the plurality of adjacent cells, and an adaptive fractional frequency reuse controller configured to control adaptive fractional frequency reuse processing in a downlink of the target cell, based on the received interference reports showing a downlink reception quality, wherein the interference reports are transmitted using selected carriers from the plurality of carriers by the plurality of wireless terminals, based on the downlink reception quality.

Abstract: A receiving device that receives a signal in a receiving antenna. The receiving device includes a gain controller that adjusts a gain in the receiving device in response to information related to power of the signal, and a signal detector that determines whether, within a predetermined period after the information related to the power of the signal exceeds a first threshold value, the information related to the power of the signal exceeds a second threshold value which is larger than the first threshold value. The gain controller adjusts a search range of the gain in the receiving device based on a determination result of the signal detector with respect to the information related to the power of the signal.

Abstract: A transmission system is provided with a pulse sequence generator that generates a pulse sequence including Golay code or Spano code, a ?/2-BPSK modulator that applies ?/2-BPSK modulation to the pulse sequence generated by the pulse sequence generator, and a phase rotator that provides phase rotation for every pulse for output of the ?/2-BPSK modulator and a reception system is provided with a phase rotator that provides a phase opposite to a phase provided by the phase rotator of the transmission system and a correlator that performs correlation calculation for output of the phase rotator, based on the output of the ?/2-BPSK modulator.

Abstract: An FFT unit subjects a P-times oversampling output of an AD converter to Fourier transform into a frequency domain signal. A distortion estimation unit estimates a distortion characteristic from a difference between the frequency domain signal and a reference signal. A correction coefficient calculation unit calculates a correction coefficient of a distortion characteristic. A correction unit corrects the frequency domain signal by using the correction coefficient. An IFFT unit subjects the corrected frequency domain signal to inverse Fourier into a time domain signal having the same sampling speed as a symbol speed, and outputs a partial time series.

Abstract: It is intended to provide an AD converter capable of increasing its conversion accuracy. An AD converter is equipped with a clock generator which generates a first clock using a second clock and a comparator which includes a comparison circuit for comparing an input signal with a prescribed value in a first period of the first clock and a precharging circuit for precharging, in a second period of the first clock, an internal voltage to a prescribed value for the next comparison operation. The clock generator includes a replica circuit of the precharging circuit of the comparator. In the replica circuit of the precharging circuit, a precharging period from the start to the end of precharging is set as the second period of the first clock.

Abstract: A receiving device that receives a signal in a receiving antenna. The receiving device includes a gain controller that adjusts a gain in the receiving device in response to information related to power of the signal, and a signal detector that determines whether, within a predetermined period after the information related to the power of the signal exceeds a first threshold value, the information related to the power of the signal exceeds a second threshold value which is larger than the first threshold value. The gain controller adjusts a search range of the gain in the receiving device based on a determination result of the signal detector with respect to the information related to the power of the signal.

Abstract: A decoding device has a decoding section that has a plurality of decoding cores which decode a received packet (e.g., likelihoods generated as a result of demodulation), which will become data to be decoded, in parallel on a per-likelihood basis and in which a first decoding core and a second decoding core of a plurality of decoding cores can perform decoding in parallel and a control section that controls decoding, wherein the decoding section lets the second decoding core decode a second likelihood when the second likelihood is input in the middle of the first decoding core decoding the first likelihood of the data to be decoded, whereby another likelihood can be decoded by use of another decoding core in the middle of decoding of a certain likelihood. Thus, entire decoding speed is increased.

Abstract: A receiving device that receives a signal in a receiving antenna. The receiving device includes a gain controller that adjusts a gain in the receiving device in response to information related to power of the signal, and a signal detector that determines whether, within a predetermined period after the information related to the power of the signal exceeds a first threshold value, the information related to the power of the signal exceeds a second threshold value which is larger than the first threshold value. The gain controller adjusts a search range of the gain in the receiving device based on a determination result of the signal detector with respect to the information related to the power of the signal.

Abstract: A receiving apparatus receives a signal via a receiving antenna and quantizes the signal. The receiving apparatus includes: a gain control section that adjusts gain in the receiving apparatus in accordance with electric power of the quantized signal; an electric power estimating section that estimates electric power of the signal before quantization of the signal received by the receiving antenna on the basis of the electric power of the quantized signal and the gain in the receiving apparatus; and an error detecting section that detects a reception error in a predetermined region of the quantized signal, and the gain control section adjusts a search range for the gain on the basis of a result of detection of the reception error in the predetermined region of the quantized signal and an electric power estimated value of the signal before quantization of the signal received by the receiving antenna.

Abstract: The error correcting decoding device of the present invention performs Low-Density Parity-Check (LDPC) decoding which accommodates a plurality of code rates while sharing circuits to suppress increase in circuit scale. If the set code rate is a second code rate which is a higher code rate than a first code rate, a column processing and row processing calculating unit (120A) uses a distributed submatrix in which a number of columns are selected and combined, wherein the number of columns is equal in number to the number of columns with which a first submatrix is constructed from a distributed check matrix corresponding to a second check matrix which accommodates the second code rate. At this time, the column processing and row processing calculating unit (120A) uses a distributed submatrix such that the row degree is less than or equal to the row degree of the first submatrix.

Abstract: A transmission power controller turns on a power supply to a transmitter at a given time taking a power rise time into account before a start time of transmission processing in the transmitter, and turns off the power supply to the transmitter when the transmission processing is finished. A reception power controller turns on a power supply to a receiver at a given time taking a power rise time into account before a time at which an ACK is assumed to be arrival from a wireless communication device on a receiver side responsive to data transmitted from the transmitter, and turns off the power supply to the receiver when the reception processing of the ACK in the receiver is finished.

Abstract: A demodulation section demodulates a received signal. A decoding section decodes an output from the demodulation section. A buffer temporarily stores a portion of the received signal. A header analyzing section gives the buffer timing at which demodulation and decoding of a payload of the received signal are initiated, on the basis of a result of combination of a plurality of header sequences included in a header of the received signal and results of processing of the demodulation section and the decoding section. An improved SNR is achieved by means of combination of the plurality of header sequences, so that an iterative decoding count used for decoding the header become smaller.

Abstract: When the SC-FDMA method is used in combination with the multi-antenna transmission technique, a radio transmission method effectively improves the frequency use efficiency by performing appropriate frequency allocation to a plurality of antennas while suppressing degradation of the reception quality caused by interference. In the radio transmission method of the SC-FDMA type, according to the number of terminals simultaneously accessing a base station within a usable frequency band, it is possible to allocate all the transmission signals (transmission stream) to be transmitted by different antennas to different frequency bands or to use the MIMO transmission in combination. Moreover, according to the number of terminals making an access, the number of terminals which perform the MIMO transmission can be varied.

Abstract: A decoding device has a decoding section that has a plurality of decoding cores which decode a received packet (e.g., likelihoods generated as a result of demodulation), which will become data to be decoded, in parallel on a per-likelihood basis and in which a first decoding core and a second decoding core of a plurality of decoding cores can perform decoding in parallel and a control section that controls decoding, wherein the decoding section lets the second decoding core decode a second likelihood when the second likelihood is input in the middle of the first decoding core decoding the first likelihood of the data to be decoded, whereby another likelihood can be decoded by use of another decoding core in the middle of decoding of a certain likelihood. Thus, entire decoding speed is increased.

Abstract: A transmission power controller turns on a power supply to a transmitter at a given time taking a power rise time into account before a start time of transmission processing in the transmitter, and turns off the power supply to the transmitter when the transmission processing is finished. A reception power controller turns on a power supply to a receiver at a given time taking a power rise time into account before a time at which an ACK is assumed to be arrival from a wireless communication device on a receiver side responsive to data transmitted from the transmitter, and turns off the power supply to the receiver when the reception processing of the ACK in the receiver is finished.

Abstract: The error correcting decoding device of the present invention performs Low-Density Parity-Check (LDPC) decoding which accommodates a plurality of code rates while sharing circuits to suppress increase in circuit scale. If the set code rate is a second code rate which is a higher code rate than a first code rate, a column processing and row processing calculating unit (120A) uses a distributed submatrix in which a number of columns are selected and combined, wherein the number of columns is equal in number to the number of columns with which a first submatrix is constructed from a distributed check matrix corresponding to a second check matrix which accommodates the second code rate. At this time, the column processing and row processing calculating unit (120A) uses a distributed submatrix such that the row degree is less than or equal to the row degree of the first submatrix.

Abstract: An FFT unit subjects a P-times oversampling output of an AD converter to Fourier transform into a frequency domain signal. A distortion estimation unit estimates a distortion characteristic from a difference between the frequency domain signal and a reference signal. A correction coefficient calculation unit calculates a correction coefficient of a distortion characteristic. A correction unit corrects the frequency domain signal by using the correction coefficient. An IFFT unit subjects the corrected frequency domain signal to inverse Fourier into a time domain signal having the same sampling speed as a symbol speed, and outputs a partial time series.

Abstract: Provided is a multi-antenna transmission device (400) which can perform MLD by using a simple configuration of a reception device in a MIMO-AMC system. The multi-antenna transmission device (400) includes common signal point mapping units (401, 402) for mapping data transmitted from different antennas (111, 112) in transmission scheme using MIMO spatial multiplexing, to common signal points shared by respective modulation methods. Thus, the arrangement of baseband signal points obtained by mapping a code word after channel encoding onto an IQ plane can be shared as common signal points shared by modulation methods. Accordingly, the reception device need not prepare a particular circuit for performing MLD calculation in accordance with a combination of the methods for modulating the signals which have been MIMO-space multiplexed. This can reduce the circuit size of the MLD calculation circuit.