Patents by Inventor Naoyasu Ikeda

Naoyasu Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010043187
    Abstract: A driving circuit for driving a liquid crystal display comprising a frame memory for storing image data, a DAC for converting digital data from the frame memory into analog signal, a buffer circuit for performing current amplification on the output of the DAC and supplying the same, and a logic controller for controlling the frame memory, the DAC, and outward circuits, in reply to a logic signal from the outward, in which the image data stored in the frame memory is supplied to the DAC without being converted from parallel to serial and the total number of the DACs and the buffer circuits within the driving circuit for use in driving the liquid crystal display is less than the number of the respective data bus lines.
    Type: Application
    Filed: May 22, 2001
    Publication date: November 22, 2001
    Applicant: NEC CORPORATION.
    Inventor: Naoyasu Ikeda
  • Publication number: 20010040548
    Abstract: A ramp voltage-generating circuit initially outputs the maximum voltage VH or the minimum voltage VL to be applied to a liquid crystal synchronizing with a ratch pulse and a clock II. In case that the maximum voltage VH is outputted initially, the output voltage of the ramp voltage-generating circuit decreases slowly with the passage of time in a predetermined period. In case that the minimum voltage is outputted initially, the output voltage of the ramp voltage-generating circuit increases slowly with the passage of time in a predetermined period. The output voltage of the ramp voltage-generating circuit keeps VH in the period T3, slowly decreases in the period T4, and keeps V0 in the period T5. In a LCD provided with the ramp voltage-generating circuit mentioned in the above, a voltage impressed upon the pixel electrode of a TFT for driving the liquid crystal follows an input voltage of a data bus line quickly, and a contrast of a picture can be prevented from being deteriorated.
    Type: Application
    Filed: December 28, 2000
    Publication date: November 15, 2001
    Applicant: NEC CORP
    Inventor: Naoyasu Ikeda
  • Patent number: 6295101
    Abstract: In a tablet integrated type liquid crystal display apparatus, a first transparent substrate is provided on a view side. The first substrate is a plastic substrate having a thickness equal to or thinner than 0.6 mm, and a counter electrode is formed on the first substrate. A second substrate on which a driving layer composed of switching elements and pixel electrodes respectively connected to the switching elements is formed. The second substrate is a glass substrate having a thickness in a range of 0.6 mm to 1.1 mm. A guest host liquid crystal layer sandwiched by the first substrate and the second substrate such that the guest host liquid crystal is driven by a voltage applied between the counter electrode and the pixel electrode. A tablet electrode layer may be provided between the first substrate and the counter electrode. Alternatively, a tablet electrode layer may be provided on the first substrate on an opposite side of the counter electrode.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: September 25, 2001
    Assignee: NEC Corporation
    Inventors: Naoyasu Ikeda, Eishi Mizobata, Yoshihiko Hirai
  • Publication number: 20010020986
    Abstract: In a tablet integrated type liquid crystal display apparatus, a first transparent substrate is provided on a view side. The first substrate is a plastic substrate having a thickness equal to or thinner than 0.6 mm, and a counter electrode is formed on the first substrate. A second substrate on which a driving layer composed of switching elements and pixel electrodes respectively connected to the switching elements is formed. The second substrate is a glass substrate having a thickness in a range of 0.6 mm to 1.1 mm. A guest host liquid crystal layer sandwiched by the first substrate and the second substrate such that the guest host liquid crystal is driven by a voltage applied between the counter electrode and the pixel electrode. A tablet electrode layer may be provided between the first substrate and the counter electrode. Alternatively, a tablet electrode layer may be provided on the first substrate on an opposite side of the counter electrode.
    Type: Application
    Filed: May 2, 2001
    Publication date: September 13, 2001
    Inventors: Naoyasu Ikeda, Eishi Mizobata, Yoshihiko Hirai
  • Publication number: 20010009419
    Abstract: An image data displaying system in which compressed image data is transmitted to an image displaying apparatus via an information transmission facility and is decompressed into an original image using an image decompressing section provided in the image displaying apparatus so as to display the original image. The image data displaying system includes image data for one screen received via said information transmission facility, said image data in a mixture of progressive driving parts and interlacing scanning parts in groups of n-pieces of lines.
    Type: Application
    Filed: January 25, 2001
    Publication date: July 26, 2001
    Inventors: Hidenori Ikeno, Naoyasu Ikeda, Hiroshi Tsuchi, Takashi Nose
  • Publication number: 20010002819
    Abstract: In a digital/analog converter for converting 2n-bit input digital data into an analog output voltage where n is 2, 3, . . . , 2n capacitors, (n−1) coupling capacitors and 2n analog switches are provided. If k is 1, 2, . . . , n, a (2k−1)−th capacitor has a unit capacitance, and a 2k−th capacitor has a capacitance twice the unit capacitance. A first terminal of the (2k−1)−th capacitor is connected to a first terminal of the 2k−th capacitor. Also, if m is 1, 2, . . . , n−1, an m−th coupling capacitor is connected between the first terminal of the 2m−th capacitor and the first terminal of the (2m+t)−th capacitor, while an (n−1)−th coupling capacitor is connected to the output terminal. If m′ is 2, 3, . . .
    Type: Application
    Filed: December 1, 2000
    Publication date: June 7, 2001
    Inventor: Naoyasu Ikeda
  • Patent number: 6069675
    Abstract: In an LCD, there is used a GH-mode liquid crystal of which change in transmittivity due to variation in gap thickness is less than that of the conventional TN liquid crystal. A tablet facility is directly arranged or electrodes having the function of the tablet are formed over or below the liquid crystal. Thanks to the structure, this protection plate conventionally required to prevent the change in gap thickness resulting due to pressure of a pen input device applied to the LCD can be eliminated. Consequently, it is possible to reduce weight, volume, and parallax of the LCD. An active matrix LCD with integrated table-type input device is attainable in a simple configuration without increasing weight and volume thereof.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: May 30, 2000
    Assignee: NEC Corporation
    Inventors: Eishi Mizobata, Naoyasu Ikeda, Yoshihiko Hirai
  • Patent number: 6031513
    Abstract: A liquid crystal display comprises a matrix of parallel gate bus lines and parallel data bus lines disposed on the substrate, a plurality of thin-film transistors disposed on a substrate near regions where the data bus lines and the gate bus lines cross at the right angles to each other, and a plurality of columns of pixel electrodes disposed on the substrate and connected respectively to the thin-film transistors. The data bus lines are grouped into a plurality of sets of at least two data bus lines for supplying signals to the columns of pixel electrodes along the data bus lines. The data bus lines in each of the sets have respective lengths different from each other. Each of the pixel electrodes in each of the columns is connected to one of the data bus lines in each of the sets through one of the thin-film transistors.
    Type: Grant
    Filed: February 6, 1998
    Date of Patent: February 29, 2000
    Assignee: NEC Corporation
    Inventor: Naoyasu Ikeda
  • Patent number: 6011529
    Abstract: In a light-emitting element drive circuit in an active matrix display device, at least one current-control transistor controls a current flowing through a light-emitting element. The current-control transistor and the light-emitting element are connected in parallel to each other. A constant current source is connected to a junction between one electrode of the light-emitting element and one electrode of the transistor through which the current 8s controlled to flow. The other electrodes of the light-emitting element and the transistor are connected to a common electrode which may be grounded via a resistor. In other configuration, it may be arranged that the light-emitting element and a capacitance are connected in parallel to each other. In this case, the current-control transistor is connected to a junction between the light-emitting element and the capacitance so as to use charging and discharging operations of the capacitance for driving the light-emitting element.
    Type: Grant
    Filed: April 15, 1999
    Date of Patent: January 4, 2000
    Assignee: NEC Corporation
    Inventor: Naoyasu Ikeda
  • Patent number: 5995172
    Abstract: In a tablet integrated type liquid crystal display apparatus, a first transparent substrate is provided on a view side. The first substrate is a plastic substrate having a thickness equal to or thinner than 0.6 mm, and a counter electrode is formed on the first substrate. A second substrate on which a driving layer composed of switching elements and pixel electrodes respectively connected to the switching elements is formed. The second substrate is a glass substrate having a thickness in a range of 0.6 mm to 1.1 mm. A guest host liquid crystal layer sandwiched by the first substrate and the second substrate such that the guest host liquid crystal is driven by a voltage applied between the counter electrode and the pixel electrode. A tablet electrode layer may be provided between the first substrate and the counter electrode. Alternatively, a tablet electrode layer may be provided on the first substrate on an opposite side of the counter electrode.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: November 30, 1999
    Assignee: NEC Corporation
    Inventors: Naoyasu Ikeda, Eishi Mizobata, Yoshihiko Hirai
  • Patent number: 5940053
    Abstract: In a light-emitting element drive circuit in an active matrix display device, at least one current-control transistor controls a current flowing through a light-emitting element are connected in parallel to each other. A constant current source is connected to a junction between one electrode of the light-emitting element and one electrode of the transistor through which the current 8s controlled to flow. The other electrodes of the light-emitting element and the transistor are connected to a common electrode which may be grounded via a resistor. In other configuration, it may be arranged that the light-emitting element and a capacitance are connected in parallel to each other. In this case, the current-control transistor is connected to a junction between the light-emitting element and the capacitance so as to use charging and discharging operations of the capacitance for driving the light-emitting element.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: August 17, 1999
    Assignee: NEC Corporation
    Inventor: Naoyasu Ikeda
  • Patent number: 5858562
    Abstract: A hole transport layer in an organic electroluminescent device is made of a material containing at least a ditriphenylaminestyryl derivative expressed by the general formula: ##STR1## where A is selected from the group consisting of substituted and non-substituted alkylidene groups, cycloalkylidene groups, oxygen atom, sulfur atom, amino groups; where Ar.sup.1, Ar.sup.3, Ar.sup.4 and Ar.sup.5 are selected from the group consisting of substituted and non-substituted arylene groups; where Ar.sup.2 and Ar.sup.6 are one selected from the group consisting of substituted aryl groups and non-substituted aryl groups; and where X and Y are substituted groups expressed by the formula: ##STR2## where Ar.sup.7 and Ar.sup.8 are selected from the group consisting of substituted aryl groups and non-substituted aryl groups; and where R.sup.
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: January 12, 1999
    Assignee: NEC Corporation
    Inventors: Koji Utsugi, Akira Hirano, Eriko Tsuruoka, Naoyasu Ikeda
  • Patent number: 5714968
    Abstract: In a light-emitting element drive circuit in an active matrix display device, at least one current-control transistor controls a current flowing through a light-emitting element. The current-control transistor and the light-emitting element are connected in parallel to each other. A constant current source is connected to a junction between one electrode of the light-emitting element and one electrode of the transistor through which the current 8s controlled to flow. The other electrodes of the light-emitting element and the transistor are connected to a common electrode which may be grounded via a resistor. In other configuration, it may be arranged that the light-emitting element and a capacitance are connected in parallel to each other. In this case, the current-control transistor is connected to a function between the light-emitting element and the capacitance so as to use charging and discharging operations of the capacitance for driving the light-emitting element.
    Type: Grant
    Filed: August 8, 1995
    Date of Patent: February 3, 1998
    Assignee: NEC Corporation
    Inventor: Naoyasu Ikeda
  • Patent number: 5670792
    Abstract: In a current-controlled luminous element array, combinations of a luminous element of a current-controlled type, a current-controlling transistor for controlling the current of the luminous element, and a switching transistor are arranged in a matrix form between signal electrode lines and scan electrode lines such that the luminous element is connected at one terminal thereof to a power source electrode line and at the other terminal thereof to a drain electrode of the current-controlling transistor, a gate electrode of the current-controlling transistor and one signal electrode line have the switching transistor connected therebetween, and the current-controlling transistor in an arbitrary column of matrix has a source electrode thereof connected to one scan electrode line in another column.
    Type: Grant
    Filed: October 12, 1994
    Date of Patent: September 23, 1997
    Assignee: NEC Corporation
    Inventors: Koji Utsugi, Naoyasu Ikeda
  • Patent number: 5642134
    Abstract: A coordinate defining signal is applied to an counter electrode in a period different from a writing period of voltages to pixel electrodes, and detected by way of an electrostatic capacitive coupling to determine a coordinate. Concurrently, to avoid a malfunction due to noises, gate and source drivers have their operations interrupted in the non-writing period. To prevent a variation of the coordinate defining signal due to capacitance variations of liquid crystal, an output of a driver for a scan or signal line is subjected to a high impedance in the non-writing period to isolate scan lines or signal lines. A light weight compact device is implemented.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: June 24, 1997
    Assignee: NEC Corporation
    Inventor: Naoyasu Ikeda
  • Patent number: 5602560
    Abstract: In an apparatus for driving a liquid crystal display panel having a plurality of gate bus lines, a plurality of data bus lines, and a plurality of pixels therebetween, a gate bus line driving circuit is connected to first ends of the gate bus lines, and an OFF level voltage applying circuit is connected to second ends of the gate bus lines opposite to the first end. The gate bus lines driving circuit selects one of the gate bus lines and applies a gate pulse thereto. The OFF level voltage applying circuit applies an OFF level voltage to the selected gate bus line by the gate bus line driving circuit immediately after the gate pulse is turned OFF.
    Type: Grant
    Filed: March 30, 1995
    Date of Patent: February 11, 1997
    Assignee: NEC Corporation
    Inventor: Naoyasu Ikeda
  • Patent number: 5457474
    Abstract: An active-matrix type LCD includes a plurality of gate bus lines and a plurality of drain bus lines each intersecting with a corresponding gate bus line at right angle, and a liquid crystal provided between a substrate on which a TFT is formed at the intersection of the gate bus line and drain bus line, and a substrate on which a common electrode is formed. The active-matrix type LCD further includes a device for producing a compensation signal to compensate a source electrode voltage of the TFT for each divided section of the display area of the active-matrix type LCD, the each divided section being obtained by dividing the display area into a plurality of sections for exposure to light when a pattern of the electrode is formed, and an adder circuit for adding the compensation signal and associated image signal, and producing the added signal.
    Type: Grant
    Filed: November 3, 1994
    Date of Patent: October 10, 1995
    Assignee: NEC Corporation
    Inventor: Naoyasu Ikeda
  • Patent number: 5182661
    Abstract: A thin film field effect transistor array includes several parallel gate bus lines formed on a transparent insulative substrate, and several parallel drain bus lines formed on the transparent insulative substrate so as to intersect the gate bus lines. Several pixel electrodes are each formed in proximity of a corresponding one of intersections between the gate bus lines and the drain bus lines, and several thin film field effect transistors are each formed in proximity of a corresponding one of intersections between the gate bus lines and the drain bus lines. Each of the thin film field effect transistors is connected to a corresponding one of the pixel electrodes. Several of storage capacitors are each formed in proximity of and connected in parallel to a corresponding one of the pixel electrodes.
    Type: Grant
    Filed: June 25, 1991
    Date of Patent: January 26, 1993
    Assignee: NEC Corporation
    Inventors: Naoyasu Ikeda, Ken-ichi Nakamura