Patents by Inventor Naoyuki Fukuda
Naoyuki Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8953191Abstract: An image processing apparatus displays a list of document data managed by a document management system, checks-out the document data selected from the list, and prints it. When a check-in is performed, a print document is scanned and scan data obtained by the scan is checked-in to the document management system.Type: GrantFiled: August 24, 2011Date of Patent: February 10, 2015Assignee: Canon Kabushiki KaishaInventor: Naoyuki Fukuda
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Publication number: 20120140275Abstract: Scan information which is to be used to generate a scan ticket for instructing a scan of a paper document and includes position information of a portable terminal is transmitted to a scan ticket server, the scan ticket is generated from the received scan information by the scan ticket server, the generated scan ticket is transmitted to an image processing apparatus, a scanned image of the paper document and attribute information including the position information are generated based on the scan ticket by the image processing apparatus, and the scanned image and the generated attribute information are transmitted to a map management server.Type: ApplicationFiled: November 30, 2011Publication date: June 7, 2012Applicant: CANON KABUSHIKI KAISHAInventor: Naoyuki Fukuda
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Publication number: 20120050806Abstract: An image processing apparatus displays a list of document data managed by a document management system, checks-out the document data selected from the list, and prints it. When a check-in is performed, a print document is scanned and scan data obtained by the scan is checked-in to the document management system.Type: ApplicationFiled: August 24, 2011Publication date: March 1, 2012Applicant: CANON KABUSHIKI KAISHAInventor: Naoyuki Fukuda
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Patent number: 6295547Abstract: A Fourier transform apparatus includes: a signal generating section for generating a plurality of sine-wave signals and a plurality of cosine-wave signals; a plurality of analog circuits each having a respective circuit parameter corresponding to a respective Fourier coefficient, and each receiving the respective sine-wave signal and the respective cosine-wave signal which are generated by the signal generating section; and an operation section for performing an operation on each of outputs of the respective analog circuits and outputting the resultant respective analog signals.Type: GrantFiled: March 8, 1999Date of Patent: September 25, 2001Assignee: Sharp Kabushiki KaishaInventors: Xiaomang Zhang, Naoyuki Fukuda
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Patent number: 5764294Abstract: A video coding device has an image motion detector, an inter-frame differencer, a discrete cosine transforming unit, and a variable length coder mounted on a single LSI. The video coding device further includes a first memory for storing a video signal block composed of a luminance signal and two color difference signals of the current frame, a second memory for storing a searching area for the luminance signal block of the previous frame, and a third memory for storing blocks of the luminance signal and two color difference signals corresponding to the detected motion vector.Type: GrantFiled: October 31, 1996Date of Patent: June 9, 1998Assignee: Sharp Kabushiki KaishaInventors: Naoyuki Fukuda, Kenji Kawahara
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Patent number: 5619676Abstract: The high speed semiconductor memory includes at least one memory module and a cache controller. The at least one memory module includes a plurality of memory cells for storing data and a cache memory for storing part of the data stored in the plurality of memory cells, The cache controller includes a hit ratio counter for obtaining an average cache hit ratio and a comparator storing a desired threshold hit value and comparing the average cache hit ratio with the desired threshold value. The cache controller determines whether data corresponding to an input address are stored in the cache memory and allows to readout such data from the cache memory, otherwise controlling the read-out of data from the plurality of memory cells for storage in the cache memory so as to update the contents of the cache memory. A request signal for transferring data from the memory cells to the cache memory is generated when the average cache hit ratio is lower than the desired threshold value.Type: GrantFiled: July 2, 1996Date of Patent: April 8, 1997Assignee: Sharp Kabushiki KaishaInventors: Naoyuki Fukuda, Yukihiro Yoshida, Noboru Kubo, Kazuo Kinosita
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Patent number: 5477278Abstract: An apparatus for detecting a motion of an image includes a first unit for calculating first partial accumulates of one block, a second unit for calculating second partial accumulates about candidate value of first partial accumulates selected in order from the smallest value and for storing total accumulates which are sums with the first and second partial accumulates, a unit for selecting a minimum total accumulate from the total accumulates stored in the second unit and for outputting the minimum total accumulate together with a location coordinate corresponding to the minimum total accumulate.Type: GrantFiled: July 12, 1994Date of Patent: December 19, 1995Assignee: Sharp Kabushiki KaishaInventors: Aoi Kitaura, Naoyuki Fukuda
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Patent number: 5267185Abstract: An apparatus for calculating a sum of products of proper elements in matrix, connected to a receiving device (21) for receiving an input vector and having a memory (11, 12) capable of storing data used to determine whether each of the matrix elements is zero or nonzero and storing data representative of contents of the matrix elements having nonzeros, the apparatus being capable of reducing a required capacity of the memory (11, 12) and a number of calculation processes in a linear transformation of the input vector received at the receiving device (21) by using a transformation matrix having matrix elements of a large scale sparse matrix, the transformation matrix being represented in a two-dimensional array and stored in the memory (11, 12), the apparatus includes a determining unit connected to the memory (11, 12) for determining whether each of the matrix elements in the transformation matrix is zero or nonzero in accordance with the zero data or the nonzero data stored in the memory (11, 12), and a calcuType: GrantFiled: November 27, 1991Date of Patent: November 30, 1993Assignee: Sharp Kabushiki KaishaInventors: Toshio Akabane, Yoshiji Fujimoto, Naoyuki Fukuda
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Patent number: 5177802Abstract: A fingerprint input apparatus is constructed to have simple construction. It serves to provide an excellen S/N ratio and reliably input a fingerprint pattern. The fingerprint input apparatus includes a light source for emitting a ray of light, a lightguide plate having a predetermined location at which a finger can be contact with the lightguide plate, a unit for directing the ray of light into at least one surfaces of the lightguide plate in a manner to keep such an angle of incidence as allowing the ray of light to be totally reflected within the lightguide plate, the lightguide plate being constructed to direct the ray of light into the predetermined location, and an image pickup unit located near the predetermined location of the lightside plate and outside of an opposite surface to a surface having the predetermined location, the image pickup unit being constructed to pick up a right irregularly reflected on a fingerprint surface of the finger contacted with the predetermined location.Type: GrantFiled: March 4, 1991Date of Patent: January 5, 1993Assignee: Sharp Kabushiki KaishaInventors: Yoshiji Fujimoto, Masayuki Katagiri, Naoyuki Fukuda, Kenji Sakamoto
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Patent number: 5170463Abstract: A neurocomputer connected to a host computer, the neurocomputer having a plurality of processor elements, each of the processor elements being placed at each of node of a lattice respectively, the neurocomputer includes a plurality of first processor elements, each of the first processor elements being placed at a node of the lattice, capable of transmitting data from and to the host computer and capable of transmitting the data to one of adjacent processor elements, a plurality of second processor elements, each of the second processor elements being placed at a node of the lattice, capable of receiving the data from one of adjacent processor elements, and capable of sending the data to another adjacent processor elements from which the data is not outputted.Type: GrantFiled: May 20, 1992Date of Patent: December 8, 1992Assignee: Sharp Kabushiki KaishaInventors: Yoshiji Fujimoto, Naoyuki Fukuda, Toshio Akabane
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Patent number: D516258Type: GrantFiled: May 26, 2004Date of Patent: February 28, 2006Assignee: Sanyo Electric Co., Ltd.Inventors: Yasuhiro Matsusaki, Masatoshi Okuda, Shinji Oda, Kazuhiro Kosukegawa, Hiroki Takase, Kensaku Noda, Naoyuki Fukuda, Yasutoshi Okamoto, Shoji Uto
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Patent number: D536143Type: GrantFiled: March 23, 2006Date of Patent: January 30, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Hiroki Takase, Satoru Fujio, Yasuhiro Matsusaki, Naoyuki Fukuda, Kensaku Noda, Sayaka Ikoma, Yosuke Tanaka, Maki Yamauchi
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Patent number: D581435Type: GrantFiled: August 14, 2006Date of Patent: November 25, 2008Assignee: Akimoto & Co.Inventors: Susumu Yamaguchi, Naoyuki Fukuda, Hidehiko Sato, Kimie Takashima, Akihiro Mochizuki, Toshiyuki Hanamure, Nobuhiko Hoshino
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Patent number: D615999Type: GrantFiled: December 5, 2006Date of Patent: May 18, 2010Assignee: Sanyo Electric Co.Inventors: Susumu Yamaguchi, Hidehiko Sato, Toshiyuki Hanamure, Naoyuki Fukuda, Kimie Takashima, Akihiro Mochizuki, Nobuhiko Hoshino
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Patent number: D432346Type: GrantFiled: February 9, 1999Date of Patent: October 24, 2000Assignee: Sanyo Electric Co., LtdInventors: Hiroki Takase, Naoyuki Fukuda