Abstract: A plasma processing apparatus includes a stage disposed in a processing chamber for mounting a wafer, a plasma generation chamber disposed above the processing chamber for plasma generation using process gas, a plate member having multiple introduction holes, made of a dielectric material, disposed above the stage and between the processing chamber and the plasma generation chamber, and a lamp disposed around the plate member for heating the wafer. The plasma processing apparatus further includes an external IR light source, an emission fiber arranged in the stage, that outputs IR light from the external IR light source toward a wafer bottom, and a light collection fiber for collecting IR light from the wafer. Data obtained using only IR light from the lamp is subtracted from data obtained also using IR light from the external IR light source during heating of the wafer. Thus, a wafer temperature is determined.

Abstract: A switch station including an ATM switch; a memory storing control data for operations of the switch station; an intra-station device, accommodating a subscriber line, performing communication operation on subscriber ATM cell; a control processor generating control information in link access protocol (LAP) format; and an interface unit converting LAP control information into ATM cell to the intra-station device through the ATM switch, wherein the control information is communicated according to LAP, the intra-station device receives the control information and transmits a direct memory access request to obtain control data stored in the memory, the interface unit obtains and converts the data format of the control data into ATM cell to transmit to the intra-station device through the switch, and the intra-station device performs the communication operation on the subscriber ATM cell based on the control data received through the switch.

Abstract: A start/stop setting section is provided on the upstream side of a dual-configuration ATM switch, and a start/stop detection section is provided on the downstream side for each of a working and a protection line. At the initiation of quality monitoring, the start/stop setting section sets a start bit in an incoming cell having a specified identifier, and thereupon starts counting the number of cells whose identifier matches the specified identifier. The start/stop detection section, upon detecting the cell having the start bit, starts counting the number of cells whose identifier matches the identifier of the detected cell. At the end of the quality monitoring, the start/stop setting section sets a stop bit in an incoming cell having the specified identifier, and thereupon stops the counting of cells.

Abstract: The quality and performance of the connectionless communications system are improved. When a BOM is received, the destination address DA of the L3-PDU stored in the payload of the BOM is retrieved, and the tag information is obtained from the DA (S11). The output message identifier MID is reserved (S12), and the tag information and output MID are assigned to the BOM (S13). Then, the tag information and output MID are written to the table. When a COM is received, the tag information and output MID are retrieved using the MID of the COM as a key, and the information is provided for the COM (S31 and S32). When an EOM is received, the tag information and output MID are retrieved using the MID of the EOM as a key, and the information is provided for the EOM (S41 and S42). Then, the output MID is released (S43).

Abstract: A first storage unit stores a reception count, which is the number of simultaneously-occurring messages for each of subscribers corresponding to subscriber identification information. A second storage unit stores a predetermined number of the simultaneously-occurring messages, which is an upper limit of allowing the messages to occur in parallel, for each of the subscribers corresponding to the subscriber identification information. A third storage unit stores each message identification information corresponding to each of the simultaneously-occurring messages, together with the order of occurrence, for each of the subscribers corresponding to the subscriber identification information. A control unit controls transfers of the simultaneously-occurring messages, by controlling the first, second, and third storage means according to the transfer order identification information, the subscriber identification information, and the message identification information extracted from the received data unit.

Abstract: A performance monitor system monitors a number of errors occurring in data processed in a communication apparatus having a duplex configuration formed of two systems. The performance monitor system includes a first unit for monitoring a number of errors occurring in data processed in one of the two systems a second unit for monitoring a number of errors occurring in data processed in another one of the two systems and a control unit for controlling operations of the first and second units. Each of the first and second units has a first counter outputting a first error count value and a second counter outputting a second error count value. The control unit controls the first and second counters so that the sum of the first and second error count values obtained in the first unit is equal to sum of those obtained in the second unit.

Abstract: On receiving voice data from a subscriber accommodated in a broadband network, a terminal adaptor separately puts the voice data in cells in 8-bit units every 125 .mu.s separately, and transmits the cells by a remote switching unit in the broadband network to subscriber terminal equipment. The subscriber terminal equipment accommodates and processes each item of 8-bit data in 24 channels in the PCM format, puts in cells the PCM-formatted data in 24 channels, and sends the cells sequentially to a broadband network transmission line through the remote switching unit. On receiving the above described data in cells, an adaptor provided between the broadband network and an existing telephone network converts the data to the PCM transmission format, and sends them to the existing telephone network after adding a signaling bit to them.

Abstract: An elastic store memory circuit includes first and second elastic store memories. Each of the first and second elastic store memories generates a phase comparison signal when a phase difference between a write timing and a read timing is within a predetermined phase range. The elastic store memory circuit also includes a selector which selects either the input data read out from the first elastic store memory or the input data read out from the second elastic store memory, and a slip signal generator for generating a slip signal on the basis of a write reset timing at which the first and second elastic store memories are reset, a read reset timing at which the first and second elastic store memories are reset, and the phase comparison signal. The slip signal indicates which one of the write reset timing and the read reset timing precedes the other one.

Abstract: A first form of an ATM channel testing apparatus tests an ATM channel by having a test cell detector in each switch to detect whether or not the switch appropriately switches a test cell generated by a test cell generating trunk. A second form of an ATM channel testing apparatus easily tests an ATM channel by having test cell generators provided for the respective input highways sequentially generating test cells including test cell identifying information and input highway identifying information, and having test cell checkers provided respectively for the output highways simply tally the test cells by the respective input highways. A third form of an ATM channel testing apparatus tests an ATM channel with less pieces of hardware by having turnaround parts in respective ordinary trunks sequentially turn around a test cell generated by a test cell generating trunk to be finally returned to the test cell generating trunk.

Abstract: An in-service activator for a broadband exchanger has a dual system structure, in which a first system and a second system form a dual pair. The first system and the second system in the dual pair each has at least one [1] channel converter and a switcher. A channel converter stores channel setting information for use in routing a cell inputted from a line, and outputs the cell inputted from the line by attaching the channel setting information to the cell. The switcher switches a cell outputted from a channel converter. The interfacer stores, in a channel converter of a to-be-activated standby system in the dual pair, the channel setting information read from the corresponding channel converter of an act system in the duplex pair.

Abstract: The present invention relates to a transmission line test method in the broadband ISDN for assembling an ATM formatted cell into a frame and sending it in the synchronous optical network (SONET) formatted transmission line as a protocol of an optical fiber communication network. First, test data are inserted into an ATM cell according to a command of the central controlling unit in an ATM switching unit. Then, the test cell is sent through an ATM switch in the ATM switching unit after the insertion of the test data; the test data are extracted from the test cell turned around by an ATM layer provided between the ATM switch and the SONET-formatted transmission line or by a subscriber terminal adapter, or from the test frame (including the test cell) turned around by a terminator in the SONET-formatted transmission line or by a network terminator at a subscriber terminal in the transmission line; and finally a transmission test is conducted by checking the data in the line up to each turnaround point.

Abstract: An ATM switching system includes two ATM switches which are the same as each other. Each of the ATM switches includes a switch buffer, and a cell counter which indicates the number of cells in the switch buffer. Each of the ATM switches also includes a difference calculator, which calculates the difference between the number of cells in the two switch buffers when one of the ATM switches is changed from an out-of-service state to a slave mode. At this time, the other ATM switch operates in a master mode. Each of the ATM switches further includes a dummy cell generator, which generates a number of dummy cells which corresponds to the difference calculated by the difference calculator. The generated dummy cells are written into the switch buffer in the slave mode. When it is determined that when all of the dummy cells have been output from the switch buffer, the two ATM switches are syunchronized with each other.