Patents by Inventor Naoyuki Tomioka

Naoyuki Tomioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130278649
    Abstract: In the plasma display apparatus, address discharge is caused stably. For this purpose, one of a forced initializing operation and a selective initializing operation is performed in the initializing period. Then, one field includes a specific-cell initializing subfield having an initializing period in which a forced initializing operation is performed in a specific discharge cell and a selective initializing operation is performed in the other discharge cells. In the address period of the specific-cell initializing subfield, the period in which a scan pulse and an address pulse are simultaneously applied to a discharge cell having undergone the selective initializing operation in the initializing period of the specific-cell initializing subfield is made longer than the period in which a scan pulse and an address pulse are simultaneously applied to a discharge cell having undergone the forced initializing operation in the initializing period of the specific-cell initializing subfield.
    Type: Application
    Filed: December 22, 2011
    Publication date: October 24, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Ayuhiko Saito, Takahiko Origuchi, Yuya Shiozaki, Naoyuki Tomioka, Hidehiko Shoji
  • Publication number: 20130241972
    Abstract: In a plasma display apparatus, contrast is enhanced and a stable address discharge is caused. For this purpose, one of a forced initializing operation and a selective initializing operation is performed in initializing periods. A specified-cell initializing subfield and a selective initializing subfield are set in one field. In the specified-cell initializing subfield, the forced initializing operation is performed on specified discharge cells and the selective initializing operation is performed on the other discharge cells. In the selective initializing subfield, the selective initializing operation is performed on all the discharge cells. In the selective initializing period, a down-ramp waveform voltage is applied to the scan electrodes and a positive voltage is applied to the data electrodes. In the selective initializing subfield, based on the load calculated in the address period of the immediately preceding subfield, the minimum voltage of the down-ramp waveform voltage is controlled.
    Type: Application
    Filed: December 1, 2011
    Publication date: September 19, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Yuya Shiozaki, Naoyuki Tomioka, Hidehiko Shoji
  • Patent number: 8502749
    Abstract: Sustain discharge is stably caused while power consumption is reduced, and image display quality is improved. A plasma display device has a plasma display panel, an electric power recovering circuit for raising or falling a sustain pulse by resonating an inductor and the inter-electrode capacity of a display electrode pair, and a sustain pulse generating circuit for alternately applying, to the display electrode pair, as many sustain pulses as the number corresponding to the luminance weight in the sustain period of a plurality of subfields that are disposed in one field and have initializing, address, and sustain periods. The sustain pulse generating circuit generates at least two kinds of sustain pulses including a first sustain pulse serving as a reference and a second sustain pulse that rises more gently than the first sustain pulse, and generates the first sustain pulse immediately after the second sustain pulse.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: August 6, 2013
    Assignee: Panasonic Corporation
    Inventor: Naoyuki Tomioka
  • Publication number: 20130113846
    Abstract: High image display quality is achieved when a 3D image is displayed on a plasma display panel (10). For this purpose, a driver circuit includes sustain pulse generation circuits (60) and (80), control signal generation circuit (45) for generating a shutter opening/closing timing signal and a control signal for controlling sustain pulse generation circuits (60) and (80), all-cell light-emitting rate detecting circuit (46) for detecting the all-cell light-emitting rate in each subfield, and partial light-emitting rate detecting circuit (47) for detecting the partial light-emitting rate in each of a plurality of regions set in an image display region of plasma display panel (10) in each subfield. The driver circuit corrects the number of sustain pulses to be generated set based on the image signal and luminance weight in each of the subfields in response to the all-cell light-emitting rate and the partial light-emitting rate.
    Type: Application
    Filed: July 21, 2011
    Publication date: May 9, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiko Origuchi, Kazuaki Sakata, Naoyuki Tomioka, Mitsuhiro Ishizuka
  • Patent number: 8384623
    Abstract: Sustain discharge is stably caused while power consumption is reduced, and image display quality is improved. A plasma display device has a plasma display panel, an electric power recovering circuit for raising or falling a sustain pulse by resonating an inductor and the inter-electrode capacity of a display electrode pair, and a sustain pulse generating circuit for alternately applying, to the display electrode pair, as many sustain pulses as the number corresponding to the luminance weight in the sustain period of a plurality of subfields that are disposed in one field and have initializing, address, and sustain periods. The sustain pulse generating circuit switches and generates at least three kinds of sustain pulses including a first sustain pulse serving as a reference, a second sustain pulse that rises more gently than the first sustain pulse, and a third sustain pulse that rises more steeply than the first sustain pulse.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: February 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Naoyuki Tomioka, Naoki Noguchi
  • Patent number: 8355017
    Abstract: The wall charge is appropriately adjusted in the initializing period, and occurrence of an abnormal discharge and an unlit cell is suppressed in the address period. Therefore, a plasma display device has a plasma display panel having a plurality of discharge cells including a display electrode pair that is formed of a scan electrode and a sustain electrode, and a scan electrode driving circuit. The scan electrode driving circuit disposes a plurality of subfields having an initializing period, an address period, and a sustain period in one field, generates a decreasing down-ramp voltage in the initializing period, and generates a negative scan pulse voltage and applies it to the scan electrodes in the address period. In the initializing period, after the generation of the down-ramp voltage, the scan electrode driving circuit generates negative pulse voltage lower than the minimum voltage of the down-ramp voltage and applies it to the scan electrodes.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: January 15, 2013
    Assignee: Panasonic Corporation
    Inventors: Naoyuki Tomioka, Hidehiko Shoji
  • Patent number: 8350784
    Abstract: In a plasma display panel, abnormal discharge in address periods is suppressed to enhance image display quality. The scan electrode driving circuit generates a first falling down-ramp voltage i.e. down-ramp voltage L2 or down-ramp voltage L4, in initializing periods, generates sustain pulses in sustain periods, generates a rising up-ramp voltage, i.e. erasing up-ramp voltage L3, at the ends of the sustain periods, and applies the voltages to the scan electrodes. After generating the sustain pulses in the sustain periods, the scan electrode driving circuit generates a second down-ramp voltage, i.e. erasing down-ramp voltage L5, which has a portion falling with a gradient gentler than that of down-ramp voltage L2 and down-ramp voltage L4. After generating erasing down-ramp voltage L5, the scan electrode driving circuit generates erasing up-ramp voltage L3 and applies the voltage to the scan electrodes.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: January 8, 2013
    Assignee: Panasonic Corporation
    Inventors: Naoyuki Tomioka, Naoki Noguchi
  • Publication number: 20130002628
    Abstract: In a plasma display apparatus displaying a stereoscopic image, crosstalk is reduced and an address discharge is caused stably. For this purpose, in the plasma display apparatus displaying a stereoscopic image, each field has a plurality of subfields, each having a sustain period where an up-ramp waveform voltage is applied to the scan electrodes after all the sustain pulses are generated. The luminance weights of the respective subfields are set such that the subfield having the lightest luminance weight is generated first in each field, the subfield having the heaviest luminance weight is generated second, and the third subfield and those thereafter have luminance weights sequentially decreasing. The up-ramp waveform voltage in the sustain period of the first subfield in each field is generated so as to have a gradient gentler than that of the up-ramp waveform voltage in the sustain periods of the subfields generated second and thereafter.
    Type: Application
    Filed: February 25, 2011
    Publication date: January 3, 2013
    Inventors: Yuichi Sakai, Hidehiko Shoji, Naoyuki Tomioka, Yuya Shiozaki
  • Publication number: 20120293469
    Abstract: Stable address discharge is caused in a plasma display panel. For this purpose, the image display region of the panel is divided into a plurality of partial display regions, and scan electrodes in each partial display region are classified into two scan electrode groups based on the arranging sequence of the scan electrodes on the panel. The two scan electrode groups are a first scan electrode group including odd-numbered scan electrodes, and a second scan electrode group including even-numbered scan electrodes, In each partial display region in the address period, an overshoot address operation is performed. To the scan electrodes to which scan pulses are to be applied from the first time to a predetermined-number-th time in each scan electrode group, scan pulses are applied where the pulse cycle is set longer than that of the scan pulses to be applied to the other scan electrodes.
    Type: Application
    Filed: January 19, 2011
    Publication date: November 22, 2012
    Inventors: Hidehiko Shoji, Takahiko Origuchi, Naoyuki Tomioka, Takateru Sawada
  • Publication number: 20120287105
    Abstract: The present invention provides a method of driving a plasma display apparatus, which allows a high-luminance large-sized panel to have stable address discharge, with increase in power consumption suppressed. In the method, one field is divided into a plurality of subfields, each of which having an address period and a sustain period. A ramp voltage is applied to the scan electrodes in the end of the sustain period. The ramp voltage increases from a base potential toward a predetermined voltage, after reaching the predetermined voltage, the ramp voltage is maintained at the voltage for a predetermined period of time and decreases to the base potential. Besides, when the number of the sustain pulses is not greater than a predetermined threshold in a subfield, the predetermined period of time of an immediately after subfield is determined to be longer than the predetermined period of time of other subfields.
    Type: Application
    Filed: January 19, 2011
    Publication date: November 15, 2012
    Inventors: Kazuhiro Kanai, Hidehiko Shoji, Naoyuki Tomioka, Takahiko Origuchi
  • Publication number: 20120281029
    Abstract: The plasma display apparatus suppresses addressing failure, enhancing stability of address discharge, and therefore, enhancing quality of display image on the panel. The present invention attains above through the followings: preparing display combination sets each of which having difference in number of combinations; determining whether or not magnitude of image signals, except for a predetermined color image signal, is greater than a threshold; and according to the determination above, selecting a set for the predetermined color image signal from the display combination sets. A display combination set used for the predetermined color image signal when the image signals except for the predetermined color image signal have magnitude not less than the threshold is smaller in number of combinations than that used for the predetermined color image signal when the image signals except for the predetermined color image signal have magnitude smaller than the threshold.
    Type: Application
    Filed: January 19, 2011
    Publication date: November 8, 2012
    Inventors: Takahiko Origuchi, Hirofumi Honda, Hidehiko Shoji, Naoyuki Tomioka, Kazuhiro Kanai
  • Publication number: 20120280963
    Abstract: The present invention allows a plasma display apparatus having a high-luminance panel to decrease initializing bright points that easily occur just after power-on of the apparatus, enhancing the quality of display image. The panel has discharge cells, each of which including a data electrode, and a display electrode pair formed of a scan electrode and a sustain electrode. In the driving method of the panel, one field period is formed of subfields, each of which including an initializing period for generating initializing discharge in the discharge cells, an address period for applying scan pulses to the scan electrodes and applying address pulses to the data electrodes, and a sustain period for applying sustain pulses to the data electrode pairs. In the structure above, a predetermined period after power-off of the apparatus has no generation of the address pulses, the scan pulses, and the sustain pulses.
    Type: Application
    Filed: January 19, 2011
    Publication date: November 8, 2012
    Inventors: Keiji Akamatsu, Yuichi Sakai, Minoru Takeda, Hidehiko Shoji, Naoyuki Tomioka
  • Publication number: 20120280954
    Abstract: Stable address discharge is caused even in a plasma display panel where the definition is enhanced and the screen is enlarged. For this purpose, in a driving method of a plasma display panel, the image display region of the panel is divided into a plurality of partial display regions each of which includes a plurality of consecutively arranged scan electrodes. In each partial display region, a sequential address operation of sequentially applying scan pulses to the scan electrodes based on the arranging sequence of the scan electrodes on the panel is performed in the address period. To the scan electrode to which a scan pulse is to be firstly applied in the address period, a scan pulse of which the pulse width is set longer than that of the scan pulse to be applied to the other scan electrodes is applied.
    Type: Application
    Filed: January 19, 2011
    Publication date: November 8, 2012
    Inventors: Naoyuki Tomioka, Takahiko Origuchi, Hidehiko Shoji
  • Publication number: 20120113165
    Abstract: A stable address discharge is caused by preventing an increase in the scan pulse voltage (amplitude) necessary for causing a stable address discharge, and thereby achieves high image display quality. For this purpose, the following operations are performed. The image display area of a plasma display panel is divided into a plurality of regions. In each region, the rate of the number of discharge cells to be lit with respect to the number of all discharge cells in each region is detected, as a partial light-emitting rate of each region, and the partial light-emitting rate is detected in each subfield. The region having the maximum partial light-emitting rate is detected and set as a first region. The regions adjacent to the first region are set as second regions, and a predetermined offset value is added to the partial light-emitting rates of the second regions so as to provide corrected partial light-emitting rates.
    Type: Application
    Filed: July 14, 2010
    Publication date: May 10, 2012
    Applicant: Panasonic Corporation
    Inventors: Takahiko Origuchi, Hidehiko Shoji, Naoyuki Tomioka
  • Publication number: 20120105516
    Abstract: An image display region is divided into a plurality of partial display regions, the scan electrodes included in each partial display region are classified into two scan electrode groups: a scan electrode group formed of the odd-numbered scan electrodes; and a scan electrode group formed of the even-numbered scan electrodes. Scan pulses are sequentially applied to one scan electrode group, and then scan pulses are sequentially applied to the other scan electrode group. The pulse width of the scan pulses applied to the first through predetermined-number-th scan electrodes belonging to the one scan electrode group is set to be longer than the pulse width of the scan pulses applied to the remaining scan electrodes belonging to the one scan electrode group.
    Type: Application
    Filed: July 7, 2010
    Publication date: May 3, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Hidehiko Shoji, Takahiko Origuchi, Naoyuki Tomioka, Takateru Sawada
  • Publication number: 20120092394
    Abstract: A stable address discharge is caused by preventing an increase in the necessary scan pulse voltage (amplitude), and thereby achieves high image display quality. For this purpose, the image display area of a plasma display panel is divided into a plurality of regions, and a partial light-emitting rate is detected in each region. The partial light-emitting rate in a current subfield is set as a first partial light-emitting rate. The partial light-emitting rate used for magnitude comparison between the partial light-emitting rates in a subfield identical with the current subfield in a field immediately preceding the field to which the current subfield belongs to is set as a second partial light-emitting rate. The absolute value of the difference between the first partial light-emitting rate and the second partial light-emitting rate is calculated in each region.
    Type: Application
    Filed: June 17, 2010
    Publication date: April 19, 2012
    Applicant: Panasonic Corporation
    Inventors: Hidehiko Shoji, Takahiko Origuchi, Naoyuki Tomioka
  • Publication number: 20120081418
    Abstract: Even in a high-definition panel, an address operation is stabilized by suppressing an abnormal discharge in the address period, and the image display quality is enhanced. For this purpose, the plasma display panel is driven for gradation display in a manner such that a plurality of subfields are set in one field and sustain discharges in a number of times in response to the luminance weight set for each subfield are generated in the sustain period.
    Type: Application
    Filed: June 15, 2010
    Publication date: April 5, 2012
    Applicant: PANASONIC CORPORATION
    Inventors: Naoyuki Tomioka, Takahiko Origuchi, Yuichi Sakai
  • Patent number: 7990344
    Abstract: A plasma display panel driving method and a plasma display device estimate the highest temperature and the lowest temperature the panel can have, according to the temperature detected by the thermal sensor, and appropriately drives the panel, to improve the image display quality. Provided are at least three driving modes having different sub-field structures: a low-temperature driving mode, an ordinary-temperature driving mode, and a high-temperature driving mode. To drive the panel, estimates of the highest temperature and the lowest temperature the panel can have are made from the temperature detected by the thermal sensor, the temperature condition of the panel is determined from the estimated highest temperature or lowest temperature, and the driving mode is switched appropriately for the panel temperature condition.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: August 2, 2011
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Maeda, Shigeo Kigo, Yoshiki Tsujita, Naoyuki Tomioka, Takeru Yamashita, Kei Kitatani
  • Publication number: 20110128308
    Abstract: In a plasma display panel, abnormal discharge in address periods is suppressed to enhance image display quality. The scan electrode driving circuit generates a first falling down-ramp voltage i.e. down-ramp voltage L2 or down-ramp voltage L4, in initializing periods, generates sustain pulses in sustain periods, generates a rising up-ramp voltage, i.e. erasing up-ramp voltage L3, at the ends of the sustain periods, and applies the voltages to the scan electrodes. After generating the sustain pulses in the sustain periods, the scan electrode driving circuit generates a second down-ramp voltage, i.e. erasing down-ramp voltage L5, which has a portion falling with a gradient gentler than that of down-ramp voltage L2 and down-ramp voltage L4. After generating erasing down-ramp voltage L5, the scan electrode driving circuit generates erasing up-ramp voltage L3 and applies the voltage to the scan electrodes.
    Type: Application
    Filed: August 4, 2009
    Publication date: June 2, 2011
    Inventors: Naoyuki Tomioka, Naoki Noguchi
  • Publication number: 20100277465
    Abstract: The wall charge is appropriately adjusted in the initializing period, and occurrence of an abnormal discharge and an unlit cell is suppressed in the address period. Therefore, a plasma display device has a plasma display panel having a plurality of discharge cells including a display electrode pair that is formed of a scan electrode and a sustain electrode, and a scan electrode driving circuit. The scan electrode driving circuit disposes a plurality of subfields having an initializing period, an address period, and a sustain period in one field, generates a decreasing down-ramp voltage in the initializing period, and generates a negative scan pulse voltage and applies it to the scan electrodes in the address period. In the initializing period, after the generation of the down-ramp voltage, the scan electrode driving circuit generates negative pulse voltage lower than the minimum voltage of the down-ramp voltage and applies it to the scan electrodes.
    Type: Application
    Filed: March 27, 2009
    Publication date: November 4, 2010
    Inventors: Naoyuki Tomioka, Hidehiko Shoji