Patents by Inventor Naozumi ISHIKAWA

Naozumi ISHIKAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9576722
    Abstract: A coil component 1 includes a thin-film coil layer including spiral conductors and bump electrodes 12a to 12d formed on a surface of the thin-film coil layer. The thin-film coil layer includes internal terminal electrodes 24a to 24d connected respectively to corresponding one ends of the spiral conductors, and a fourth insulating layer 15d covering the internal terminal electrode 24a to 24d and having openings ha to hd. Both a top surface TS and a side surface SS of each of the internal terminal electrodes 24a to 24d are exposed through the corresponding opening. The bump electrodes 12a to 12d are each brought into contact with both the top surface TS and side surface SS of each of the internal terminal electrodes 24a to 24d in the corresponding opening.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: February 21, 2017
    Assignee: TDK CORPORATION
    Inventors: Fumio Watanabe, Naozumi Ishikawa, Hiroshi Kamiyama
  • Patent number: 9532461
    Abstract: A first alignment mark is given to a substrate, and a second alignment mark is given to a mask. The mask forms an electronic circuit pattern on the substrate. A control unit performs alignment of the mask and the substrate based on the first and second alignment marks. The second alignment mark is formed to surround the first alignment mark. The second alignment mark has a step pattern therein.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: December 27, 2016
    Assignee: TDK CORPORATION
    Inventors: Naozumi Ishikawa, Fumio Watanabe, Hiroshi Kamiyama
  • Patent number: 9214270
    Abstract: An electronic component includes a first conductor layer including a first conductor pattern P1, a first insulating layer covering the first conductor layer, a first opening h1 passing through the first insulting layer to expose top and side surfaces of the first conductor pattern P1 therethrough, and a second conductor layer formed on the first insulating layer and including a second conductor pattern P2 connected to the first conductor pattern P1 through the first opening h1. A first opening region which is a planar region inside the first opening h1 includes a first region in which the first conductor pattern P1 is formed and a second region in which the first conductor pattern P1 is not formed. The second conductor pattern P2 is embedded in both the first and second regions of the first opening h1.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: December 15, 2015
    Assignee: TDK CORPORATION
    Inventors: Fumio Watanabe, Naozumi Ishikawa, Hiroshi Kamiyama
  • Publication number: 20140292466
    Abstract: A coil component 1 includes a thin-film coil layer including spiral conductors and bump electrodes 12a to 12d formed on a surface of the thin-film coil layer. The thin-film coil layer includes internal terminal electrodes 24a to 24d connected respectively to corresponding one ends of the spiral conductors, and a fourth insulating layer 15d covering the internal terminal electrode 24a to 24d and having openings ha to hd. Both a top surface TS and a side surface SS of each of the internal terminal electrodes 24a to 24d are exposed through the corresponding opening. The bump electrodes 12a to 12d are each brought into contact with both the top surface TS and side surface SS of each of the internal terminal electrodes 24a to 24d in the corresponding opening.
    Type: Application
    Filed: March 27, 2014
    Publication date: October 2, 2014
    Applicant: TDK CORPORATION
    Inventors: Fumio WATANABE, Naozumi ISHIKAWA, Hiroshi KAMIYAMA
  • Publication number: 20140293258
    Abstract: A first alignment mark is given to a substrate, and a second alignment mark is given to a mask. The mask forms an electronic circuit pattern on the substrate. A control unit performs alignment of the mask and the substrate based on the first and second alignment marks. The second alignment mark is formed to surround the first alignment mark. The second alignment mark has a step pattern therein.
    Type: Application
    Filed: March 25, 2014
    Publication date: October 2, 2014
    Applicant: TDK CORPORATION
    Inventors: Naozumi ISHIKAWA, Fumio WATANABE, Hiroshi KAMIYAMA
  • Publication number: 20140266547
    Abstract: An electronic component includes a first conductor layer including a first conductor pattern P1, a first insulating layer covering the first conductor layer, a first opening h1 passing through the first insulting layer to expose top and side surfaces of the first conductor pattern P1 therethrough, and a second conductor layer formed on the first insulating layer and including a second conductor pattern P2 connected to the first conductor pattern P1 through the first opening h1. A first opening region which is a planar region inside the first opening h1 includes a first region in which the first conductor pattern P1 is formed and a second region in which the first conductor pattern P1 is not formed. The second conductor pattern P2 is embedded in both the first and second regions of the first opening h1.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 18, 2014
    Applicant: TDK CORPORATION
    Inventors: Fumio WATANABE, Naozumi ISHIKAWA, Hiroshi KAMIYAMA