Abstract: A semiconductor memory device includes a substrate extending in a first direction and second direction perpendicular to the first direction, bitline structures arranged on a substrate in the first direction, the bitline structures extending in the second direction, spacer structures disposed on sidewalls of the bitline structures to extend in the second direction, the spacer structures including spacers, which are formed of air or silicon oxide, contact structures disposed between the spacer structures and arranged in the second direction; fence structures filling gaps between the contact structures and between the spacer structures, and pad isolation films isolating the contact structures on the bitline structures, the spacer structures, and the fence structures. The fence structures include first fence liners and second fence liners, which are on the first fence liners and are formed of one of air and silicon oxide, and which overlap with the spacers in the first direction.

Abstract: Disclosed herein is a feed-forward ring oscillator. The feed-forward ring oscillator includes a plurality of delay cells for receiving a first differential input signal pair and a second differential input signal pair, and outputting a differential output signal pair. The delay cells are connected in a ring shape. Each of the delay cells receives a differential output signal pair of a delay cell of a previous stage as a first differential input signal pair and receives a differential output signal pair of a delay cell of a stage before the previous stage as a second differential input signal pair. Each of the delay cells comprises multiple independent gate field-effect transistors.

Abstract: Disclosed herein is a feed-forward ring oscillator. The feed-forward ring oscillator includes a plurality of delay cells for receiving a first differential input signal pair and a second differential input signal pair, and outputting a differential output signal pair. The delay cells are connected in a ring shape. Each of the delay cells receives a differential output signal pair of a delay cell of a previous stage as a first differential input signal pair and receives a differential output signal pair of a delay cell of a stage before the previous stage as a second differential input signal pair. Each of the delay cells comprises multiple independent gate field-effect transistors.