Patents by Inventor Narahari Ramanuja

Narahari Ramanuja has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8067260
    Abstract: A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of at least two successive spacers enables the limitations imposed by lithography and the limitations imposed by bread loafing be overcome to provide reduced critical dimension elements.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: November 29, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Ming Jin, Ilya V. Karpov, Jinwook Lee, Narahari Ramanuja
  • Patent number: 7754516
    Abstract: A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of at least two successive spacers enables the limitations imposed by lithography and the limitations imposed by bread loafing to be overcome to provide reduced critical dimension elements.
    Type: Grant
    Filed: October 6, 2008
    Date of Patent: July 13, 2010
    Inventors: Ming Jin, Ilya V. Karpov, Jinwook Lee, Narahari Ramanuja
  • Publication number: 20090142927
    Abstract: A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of at least two successive spacers enables the limitations imposed by lithography and the limitations imposed by bread loafing to be overcome to provide reduced critical dimension elements.
    Type: Application
    Filed: October 6, 2008
    Publication date: June 4, 2009
    Inventors: Ming Jin, Ilya V. Karpov, Jinwook Lee, Narahari Ramanuja
  • Publication number: 20070023857
    Abstract: A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of at least two successive spacers enables the limitations imposed by lithography and the limitations imposed by bread loafing to be overcome to provide reduced critical dimension elements.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Ming Jin, Ilya Karpov, Jinwook Lee, Narahari Ramanuja
  • Publication number: 20060060845
    Abstract: A semiconductor device having a conductive layer above a dielectric layer and a top metal layer. The conductive layer is patterned to form an alternate probe area to test the functionality of active circuitry within the semiconductor device and patterned to electrically route a thru semiconductor via within the semiconductor device to an alternate junction point.
    Type: Application
    Filed: September 20, 2004
    Publication date: March 23, 2006
    Inventors: Narahari Ramanuja, Florence Pon, Timothy Takeuchi