Abstract: A system has a hoist system to lift a payload to a position adjacent to a ceiling of a room Image sensor systems collect visual data and payload depth data within the payload and ambient depth data within the room. A controller is connected to the hoist system and the image sensor systems. The controller is configured to control the motion of the hoist system.

Abstract: In one implementation, a computing device includes a secure storage to store a plurality of security elements, a processor, and a storage medium including instructions. The instructions are executable by the processor to: receive a configuration request for a first server, the configuration request including one or more logical references to security settings of the first server; retrieve, from the secure storage, one or more security elements corresponding to the one or more logical references in the configuration request; and configure an operating system volume for the first server based on the configuration request and the one or more security elements.

Abstract: A method and apparatus for optimizing calibrations of a memory subsystem is disclosed. A memory controller of a memory subsystem includes a memory interface suitable for coupling to a DRAM having a plurality of banks. The memory controller includes a state machine the state machine may initiate calibration of circuitry within the memory controller. Responsive to initiating the calibration, the state machine also causes a refresh command to be transmitted to the DRAM. The calibration is then performed concurrent with the refresh of the DRAM. Subsequent to transmitting the refresh command, the state machine causes the memory interface to be placed into a low power state.

Abstract: A system, method and program product for analyzing product preferences and providing trend analysis for a gathering of individuals at an event. An infrastructure is disclosed having a system for setting up and managing an event; a system for registering users physically attending the event; a system for registering items associated with the users and storing event-user-item (EUI) information in an EUI database; and an analysis system for analyzing EUI information to provide item preferences and trend analysis.

Abstract: Systems and methods for preventing leakage of protected data to unsecured applications and documents may include determining that a first document is a protected document in a managed application, detecting a request to copy protected data from the first document to a system clipboard accessible by unprotected documents, redirecting the protected data to a secure clipboard, determining that a second document is an unprotected document, detecting a request to paste the protected data into the second document, and refraining from pasting the protected data into the second document. The secure clipboard may be implemented by a data leakage prevention (DLP) client. It may be separate from the system clipboard and inaccessible by unprotected documents. Dynamic-link library injection and API hooking may allow the DLP client to intercept clipboard related function calls made by managed applications into the operating system and to transparently change the behavior of the managed application.

Abstract: A memory controller circuit coupled to multiple memory circuits may receive requests to access particular locations within the multiple memory circuits. A request may be assigned a particular quality-of-service level. During operation, the memory controller circuit may reallocate the quality-of-service level of a particular request to a new quality-of-service level based on accumulated bandwidth credits associated with the new quality-of-service level.

Abstract: A memory controller circuit coupled to multiple memory circuits may receive a read request for a particular one of the memory circuits and insert the read request into one of multiple linked lists that includes a linked list whose entries correspond to previously received read requests and are linked according to respective ages of the read requests. The memory controller circuit may schedule the read request using a head pointer of one of the multiple linked lists.

Abstract: In one or more embodiments, one or more systems, methods, and/or processes may redirect a request to open a document to a background process that controls access to the document; may determine policy information associated with the document and a user of an application; may provide the document to the application; may determine an area of a user interface of the application that displays information of the document; may determine watermark information based at least on the policy information; may generate one or more watermarks based at least on the watermark information; and may display the one or more watermarks, based at least on the watermark information, on the area of the user interface of the application that displays the information of the document.

Abstract: The present disclosure relates to crystalline forms of venetoclax and process for their preparation. The present disclosure also relates to process for preparation of amorphous venetoclax.

Abstract: An apparatus includes a memory circuit and a memory controller circuit. The memory controller circuit may include a write request queue. The memory controller circuit may be configured to receive a memory request to access the memory circuit and determine if the memory request includes a read request or a write request. A received read request may be scheduled for execution, while a received write request may be stored in the write request queue. The memory controller circuit may reorder scheduled memory requests based on achieving a specified memory access efficiency and based on a number of write requests stored in the write request queue.

Abstract: A memory request management system may include a memory device and a memory controller. The memory controller may include a read queue, a write queue, an arbitration circuit, a read credit allocation circuit, and a write credit allocation circuit. The read queue and write queue may store corresponding requests from request streams. The arbitration circuit may send requests from the read queue and write queue to the memory device based on locations of addresses indicated by the requests. The read credit allocation circuit may send an indication of an available read credit to a request stream in response to a read request from the request stream being sent from the read queue to the memory device. The write credit allocation circuit may send an indication of an available write credit to a request stream in response to a write request from the request stream being stored at the write queue.

Abstract: In one embodiment, a method includes processing network data models at a network device operating in a network comprising a plurality of network components, each of the network components associated with one of the network data models, performing semantic matching at the network device for at least two of the network data models, the semantic matching comprising computing labels for elements of the network data models utilizing label computation algorithms configured for notational conventions used in the network data models, computing contexts for the elements based on a hierarchy of each of the network data models, removing one or more of the labels used to form the contexts to create reduced contexts, and computing a semantic relationship for the reduced contexts of the network data models. The network data models are mapped at the network device based on the semantic matching for use in a network application. An apparatus and logic are also disclosed herein.

Abstract: A system, method and program product for analyzing product preferences and providing trend analysis for a gathering of individuals at an event. An infrastructure is disclosed having a system for setting up and managing an event; a system for registering users physically attending the event; a system for registering items associated with the users and storing event-user-item (EUI) information in an EUI database; and an analysis system for analyzing EUI information to provide item preferences and trend analysis.

Abstract: An imaging system includes a microscope to generate magnified images of regions of interest of a tissue sample, a camera to capture and store the magnified images, and a controller. The controller is configured to, for each magnification level in a sequence of increasing magnification levels, image one or more regions of interest of the tissue sample at the current magnification level. For each region of interest, data is generated defining one or more refined regions of interest based on the magnified image of the region of interest of the tissue sample at the current magnification level. Each refined region of interest corresponds to a proper subset of the tissue sample, and the refined regions of interest of the tissue sample provide the regions of interest to be imaged at a next magnification level from the sequence of increasing magnification levels.

Abstract: An embodiment of an apparatus includes a memory circuit and a memory controller circuit. The memory controller circuit may include a write request queue. The memory controller circuit may be configured to receive a memory request to access the memory circuit and determine if the memory request includes a read request or a write request. A received read request may be scheduled for execution, while a received write request may be stored in the write request queue. The memory controller circuit may reorder scheduled memory requests based on achieving a specified memory access efficiency and based on a number of write requests stored in the write request queue.

Abstract: Techniques relating to arbitration in a memory controller are disclosed. In some embodiments, the memory controller is configured to transition between read turns and writes turn according to a turn schedule. In some embodiments, the memory controller also receives reports from circuitry requesting memory transactions and determines a current latency tolerance value based on the reports. In some embodiments, the memory controller is configured to switch from a write turn to a read turn prior to a scheduled switch based on the current latency tolerance meeting a threshold value.

Abstract: A memory request management system may include a memory device and a memory controller. The memory controller may include a read queue, a write queue, an arbitration circuit, a read credit allocation circuit, and a write credit allocation circuit. The read queue and write queue may store corresponding requests from request streams. The arbitration circuit may send requests from the read queue and write queue to the memory device based on locations of addresses indicated by the requests. The read credit allocation circuit may send an indication of an available read credit to a request stream in response to a read request from the request stream being sent from the read queue to the memory device. The write credit allocation circuit may send an indication of an available write credit to a request stream in response to a write request from the request stream being stored at the write queue.

Abstract: A method for switching between a first lens and a second lens in an electronic device includes displaying, by the electronic device, a first frame showing a field of view (FOV) of the first lens; detecting, by the electronic device, an event that causes the electronic device to transition from displaying the first frame to displaying a second frame showing a FOV of the second lens; generating, by the electronic device and based on the detecting the event, at least one intermediate frame for transitioning from the first frame to the second frame; and switching, by the electronic device and based on the detecting the event, from the first lens to the second lens and displaying the second frame, wherein the at least one intermediate frame is displayed after the displaying the first frame and before the displaying the second frame while the switching is performed.

Abstract: A memory controller circuit coupled to a memory circuit that includes multiple banks may receive multiple access requests including a particular access request to a particular bank of the plurality of banks. The particular access request is associated with a particular virtual channel of a plurality of virtual channels. The memory controller circuit may select a given access requests of the multiple access requests based on an arbitration category value associated with a virtual channel of the given access request and modify the arbitration category value in response to selecting the given access request.