Patents by Inventor Narasimhan R. Trichy

Narasimhan R. Trichy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7567105
    Abstract: A CAN receiver architecture design that provides better immunity against EMI interference than conventional designs is disclosed herein. This CAN receiver includes a voltage divider network connected to a front-end amplifier for dividing down the input signal from a two wire line by a predetermined amount and amplifying the signal by the same predetermined amount. The front-end amplifier generates the common-mode voltage of the input signal for a reference generator that determines the logic level of the incoming signal and subtracts a bandgap voltage reference from the common-mode voltage. A comparator compares the difference between the output of the front-end amplifier and the resultant signal generated by the reference generator to generate an output signal for the receiver. This CAN receiver architecture is faster than conventional designs and possesses an improved common-mode rejection, while operating over a wide input common mode range.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: July 28, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Narasimhan R. Trichy, Wayne Tien-Feng Chen
  • Patent number: 7274916
    Abstract: A differential signal receiver and method is disclosed. One embodiment relates to a receiver for receiving a differential signal. The receiver includes a first voltage-to-current converter that converts the voltage received at a first input to a first current, and a second voltage-to-current converter that converts a voltage signal received at a second input to a second current. A current subtractor provides a difference current of the first and second currents that is indicative of the differential signal.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: September 25, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Mohammad A. Al-Shyoukh, Narasimhan R. Trichy
  • Patent number: 7236034
    Abstract: The self correcting scheme to match pull up and pull down devices includes: a first comparator for comparing a common mode signal to a high reference limit; a second comparator for comparing the common mode signal to a low reference limit; a first flip flop having an input coupled to an output of the first comparator; a second flip flop having an input coupled to an output of the second comparator; a counter having inputs coupled to the first and second flip flops; and a delay device controlled by an output of the counter, wherein the delay device provides a pull down control signal that is delayed relative to a pull up control signal.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Wayne T. Chen, Narasimhan R. Trichy