Patents by Inventor Narasimhulu Kanike
Narasimhulu Kanike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10840387Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, a first insulator region disposed below the semiconductor region, a first non-insulative region disposed below the first insulator region, a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, wherein the semiconductor region is disposed between the second non-insulative region and the third non-insulative region. In certain aspects, the semiconductor variable capacitor may include a second insulator region disposed above the semiconductor region and a second semiconductor region disposed above the second insulator region.Type: GrantFiled: April 5, 2018Date of Patent: November 17, 2020Assignee: QUALCOMM IncorporatedInventors: Fabio Alessio Marino, Sinan Goktepeli, Narasimhulu Kanike, Qingqing Liang, Paolo Menegoli, Francesco Carobolante, Aristotele Hadjichristos
-
Patent number: 10622492Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, an insulative layer, and a first non-insulative region, the insulative layer being disposed between the semiconductor region and the first non-insulative region. In certain aspects, the semiconductor variable capacitor may also include a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, the second non-insulative region and the third non-insulative region having different doping types. In certain aspects, the semiconductor variable capacitor may also include an implant region disposed between the semiconductor region and the insulative layer. The implant region may be used to adjust the flat-band voltage of the semiconductor variable capacitor.Type: GrantFiled: January 15, 2018Date of Patent: April 14, 2020Assignee: QUALCOMM IncorporatedInventors: Fabio Alessio Marino, Narasimhulu Kanike, Francesco Carobolante, Paolo Menegoli, Qingqing Liang
-
Patent number: 10608124Abstract: Certain aspects of the present disclosure provide a semiconductor device. One example semiconductor device generally includes a semiconductor region, an insulative layer, a first terminal, and a first non-insulative region coupled to the first terminal, the insulative layer being disposed between the first non-insulative region and the semiconductor region. In certain aspects, the insulative layer is disposed adjacent to a first side of the semiconductor region. In certain aspects, the semiconductor device also includes a second terminal, and a first silicide layer coupled to the second terminal and disposed adjacent to a second side of the semiconductor region, the first side and the second side being opposite sides of the semiconductor region.Type: GrantFiled: April 19, 2018Date of Patent: March 31, 2020Assignee: QUALCOMM IncorporatedInventors: Sinan Goktepeli, Fabio Alessio Marino, Narasimhulu Kanike, Plamen Vassilev Kolev, Qingqing Liang, Paolo Menegoli, Francesco Carobolante, Aristotele Hadjichristos
-
Publication number: 20190326448Abstract: Certain aspects of the present disclosure provide a semiconductor device. One example semiconductor device generally includes a semiconductor region, an insulative layer, a first terminal, and a first non-insulative region coupled to the first terminal, the insulative layer being disposed between the first non-insulative region and the semiconductor region. In certain aspects, the insulative layer is disposed adjacent to a first side of the semiconductor region. In certain aspects, the semiconductor device also includes a second terminal, and a first silicide layer coupled to the second terminal and disposed adjacent to a second side of the semiconductor region, the first side and the second side being opposite sides of the semiconductor region.Type: ApplicationFiled: April 19, 2018Publication date: October 24, 2019Inventors: Sinan GOKTEPELI, Fabio Alessio MARINO, Narasimhulu KANIKE, Plamen Vassilev KOLEV, Qingqing LIANG, Paolo MENEGOLI, Francesco CAROBOLANTE, Aristotele HADJICHRISTOS
-
Publication number: 20190312152Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, a first insulator region disposed below the semiconductor region, a first non-insulative region disposed below the first insulator region, a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, wherein the semiconductor region is disposed between the second non-insulative region and the third non-insulative region. In certain aspects, the semiconductor variable capacitor may include a second insulator region disposed above the semiconductor region and a second semiconductor region disposed above the second insulator region.Type: ApplicationFiled: April 5, 2018Publication date: October 10, 2019Inventors: Fabio Alessio MARINO, Sinan GOKTEPELI, Narasimhulu KANIKE, Qingqing LIANG, Paolo MENEGOLI, Francesco CAROBOLANTE, Aristotele HADJICHRISTOS
-
Publication number: 20190305143Abstract: In certain aspects, a variable capacitor comprises a well having a first side and a second side, an N+ diffusion abutted the well at the first side, a P+ diffusion abutted the well at the second side, and an insulator on the well. The variable capacitor further comprises a gate plate on the insulator having a first gate segment and a second gate segment, wherein the first gate segment and the second gate segment are configured to have different work functions.Type: ApplicationFiled: March 27, 2018Publication date: October 3, 2019Inventors: Fabio Alessio MARINO, Narasimhulu KANIKE, Qingqing LIANG, Francesco CAROBOLANTE, Paolo MENEGOLI
-
Patent number: 10424641Abstract: Certain aspects of the present disclosure provide a semiconductor device. One example semiconductor device generally includes a first semiconductor region; a first non-insulative region disposed adjacent to a first lateral side of the first semiconductor region; a second non-insulative region disposed adjacent to a second lateral side of the first semiconductor region, the second lateral side being opposite to the first lateral side; a second semiconductor region disposed adjacent to a third lateral side of the first semiconductor region, the second semiconductor region and the first semiconductor region having at least one of different doping types or different doping concentrations; an insulative layer adjacent to a top side of the first semiconductor region; and a third non-insulative region, the insulative layer being disposed between the third non-insulative region and the first semiconductor region.Type: GrantFiled: April 20, 2018Date of Patent: September 24, 2019Assignee: QUALCOMM IncorporatedInventors: Qingqing Liang, Francesco Carobolante, Fabio Alessio Marino, Narasimhulu Kanike, Paolo Menegoli, Aristotele Hadjichristos
-
Patent number: 10418465Abstract: Certain aspects of the present disclosure provide a memory device. One example memory device generally includes a first semiconductor region having a first region, a second region, and a third region, the second region being between the first region and the third region and having a different doping type than the first region and the third region. In certain aspects, the memory device also includes a first non-insulative region, a first insulative region being disposed between the first non-insulative region and the first semiconductor region. In certain aspects, the memory device may include a second non-insulative region, and a second insulative region disposed between the second region and the second non-insulative region, wherein the first insulative region and the second insulative region are disposed adjacent to opposite sides of the second region.Type: GrantFiled: May 3, 2018Date of Patent: September 17, 2019Assignee: QUALCOMM IncorporatedInventors: Qingqing Liang, Francesco Carobolante, Sinan Goktepeli, George Imthurn, Fabio Alessio Marino, Narasimhulu Kanike
-
Publication number: 20190280125Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device and techniques for fabricating a semiconductor device. In certain aspects, the semiconductor device includes a fin, a first non-insulative region disposed adjacent to a first side of the fin, and a second non-insulative region disposed adjacent to a second side of the fin. In certain aspects, the first non-insulative region and the second non-insulative region are separated by a trench, at least a portion of the trench being filled with a dielectric material disposed around the fin.Type: ApplicationFiled: May 28, 2019Publication date: September 12, 2019Inventors: Narasimhulu KANIKE, Qingqing LIANG, Fabio Alessio MARINO, Francesco CAROBOLANTE
-
Publication number: 20190221677Abstract: Certain aspects of the present disclosure provide semiconductor variable capacitors. One example semiconductor variable capacitor generally includes a semiconductor region, an insulative layer, and a first non-insulative region, the insulative layer being disposed between the semiconductor region and the first non-insulative region. In certain aspects, the semiconductor variable capacitor may also include a second non-insulative region disposed adjacent to the semiconductor region, and a third non-insulative region disposed adjacent to the semiconductor region, the second non-insulative region and the third non-insulative region having different doping types. In certain aspects, the semiconductor variable capacitor may also include an implant region disposed between the semiconductor region and the insulative layer. The implant region may be used to adjust the flat-band voltage of the semiconductor variable capacitor.Type: ApplicationFiled: January 15, 2018Publication date: July 18, 2019Inventors: Fabio Alessio MARINO, Narasimhulu KANIKE, Francesco CAROBOLANTE, Paolo MENEGOLI, Qingqing LIANG
-
Patent number: 10355134Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device and techniques for fabricating a semiconductor device. In certain aspects, the semiconductor device includes a fin, a first non-insulative region disposed adjacent to a first side of the fin, and a second non-insulative region disposed adjacent to a second side of the fin. In certain aspects, the first non-insulative region and the second non-insulative region are separated by a trench, at least a portion of the trench being filled with a dielectric material disposed around the fin.Type: GrantFiled: May 23, 2017Date of Patent: July 16, 2019Assignee: QUALCOMM IncorporatedInventors: Narasimhulu Kanike, Qingqing Liang, Fabio Alessio Marino, Francesco Carobolante
-
Patent number: 10319866Abstract: Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a semiconductor region, an insulative layer disposed above the semiconductor region, and a first non-insulative region disposed above the insulative layer. In certain aspects, a second non-insulative region is disposed adjacent to the semiconductor region, and a control region is disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region.Type: GrantFiled: February 13, 2017Date of Patent: June 11, 2019Assignee: QUALCOMM IncorporatedInventors: Fabio Alessio Marino, Paolo Menegoli, Narasimhulu Kanike, Francesco Carobolante
-
Patent number: 10211347Abstract: Certain aspects of the present disclosure provide a semiconductor capacitor. The semiconductor capacitor generally includes an insulative layer, and a semiconductor region disposed adjacent to a first side of the insulative layer. The semiconductor capacitor also includes a first non-insulative region disposed adjacent to a second side of the insulative layer. In certain aspects, the semiconductor region may include a second non-insulative region, wherein the semiconductor region includes at least two regions having at least one of different doping concentrations or different doping types, and wherein one or more junctions between the at least two regions are disposed above or below the first non-insulative region.Type: GrantFiled: September 15, 2017Date of Patent: February 19, 2019Assignee: QUALCOMM IncorporatedInventors: Fabio Alessio Marino, Narasimhulu Kanike, Qingqing Liang, Francesco Carobolante, Paolo Menegoli
-
Patent number: 10181533Abstract: Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a first non-insulative region disposed above a semiconductor region, and a second non-insulative region disposed adjacent to the semiconductor region. In certain aspects, the semiconductor variable capacitor also includes a first silicide layer disposed above the second non-insulative region, wherein the first silicide layer overlaps at least a portion of the semiconductor region. In certain aspects, a control region may be disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region.Type: GrantFiled: December 21, 2017Date of Patent: January 15, 2019Assignee: QUALCOMM IncorporatedInventors: Fabio Alessio Marino, Paolo Menegoli, Narasimhulu Kanike, Francesco Carobolante, Qingqing Liang
-
Publication number: 20190006530Abstract: Certain aspects of the present disclosure provide a variable capacitor. The variable capacitor generally includes a semiconductor region, a dielectric layer disposed adjacent to the semiconductor region, and a first non-insulative region disposed above the dielectric layer, and a second non-insulative region disposed adjacent to the semiconductor region. In certain aspects, a doping concentration of the semiconductor region changes as a function of a distance across the semiconductor region from the dielectric layer or the second non-insulative region.Type: ApplicationFiled: June 29, 2017Publication date: January 3, 2019Inventors: Fabio Alessio MARINO, Paolo MENEGOLI, Narasimhulu KANIKE, Qingqing LIANG, Francesco CAROBOLANTE
-
Publication number: 20180374963Abstract: Certain aspects of the present disclosure provide a semiconductor capacitor. The semiconductor capacitor generally includes an insulative layer, and a semiconductor region disposed adjacent to a first side of the insulative layer. The semiconductor capacitor also includes a first non-insulative region disposed adjacent to a second side of the insulative layer. In certain aspects, the semiconductor region may include a second non-insulative region, wherein the semiconductor region includes at least two regions having at least one of different doping concentrations or different doping types, and wherein one or more junctions between the at least two regions are disposed above or below the first non-insulative region.Type: ApplicationFiled: September 15, 2017Publication date: December 27, 2018Inventors: Fabio Alessio MARINO, Narasimhulu KANIKE, Qingqing LIANG, Francesco CAROBOLANTE, Paolo MENEGOLI
-
Publication number: 20180342620Abstract: Certain aspects of the present disclosure generally relate to a semiconductor device and techniques for fabricating a semiconductor device. In certain aspects, the semiconductor device includes a fin, a first non-insulative region disposed adjacent to a first side of the fin, and a second non-insulative region disposed adjacent to a second side of the fin. In certain aspects, the first non-insulative region and the second non-insulative region are separated by a trench, at least a portion of the trench being filled with a dielectric material disposed around the fin.Type: ApplicationFiled: May 23, 2017Publication date: November 29, 2018Inventors: Narasimhulu KANIKE, Qingqing LIANG, Fabio Alessio MARINO, Francesco CAROBOLANTE
-
Publication number: 20180240915Abstract: Certain aspects of the present disclosure generally relate to techniques for adjusting or setting a capacitance-versus-voltage (C-V) characteristic of a variable capacitor. For example, certain aspects of the present disclosure provide a capacitor device. The capacitor device generally includes a first variable capacitor and a second variable capacitor, each comprising a first terminal and a second terminal. In certain aspects, the second terminal of the second variable capacitor is coupled to the first terminal of the first variable capacitor, and the first terminal of the first variable capacitor is coupled to at least one biasing voltage node. In some cases, a decoupling capacitor may be coupled to the first terminal of the first variable capacitor.Type: ApplicationFiled: February 21, 2017Publication date: August 23, 2018Inventors: Fabio Alessio MARINO, Paolo MENEGOLI, Narasimhulu KANIKE, Francesco CAROBOLANTE
-
Publication number: 20180233603Abstract: Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a semiconductor region, an insulative layer disposed above the semiconductor region, and a first non-insulative region disposed above the insulative layer. In certain aspects, a second non-insulative region is disposed adjacent to the semiconductor region, and a control region is disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region.Type: ApplicationFiled: February 13, 2017Publication date: August 16, 2018Inventors: Fabio Alessio MARINO, Paolo MENEGOLI, Narasimhulu KANIKE, Francesco CAROBOLANTE
-
Publication number: 20180233605Abstract: Certain aspects of the present disclosure provide a semiconductor variable capacitor. The semiconductor variable capacitor generally includes a first non-insulative region disposed above a semiconductor region, and a second non-insulative region disposed adjacent to the semiconductor region. In certain aspects, the semiconductor variable capacitor also includes a first silicide layer disposed above the second non-insulative region, wherein the first silicide layer overlaps at least a portion of the semiconductor region. In certain aspects, a control region may be disposed adjacent to the semiconductor region such that a capacitance between the first non-insulative region and the second non-insulative region is configured to be adjusted by varying a control voltage applied to the control region.Type: ApplicationFiled: December 21, 2017Publication date: August 16, 2018Inventors: Fabio Alessio MARINO, Paolo MENEGOLI, Narasimhulu KANIKE, Francesco CAROBOLANTE, Qingqing LIANG