Patents by Inventor Narayan Dass Taneja

Narayan Dass Taneja has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140093994
    Abstract: The present application is a photodiode detector array for use in computerized tomography (CT) and non-CT applications. Specifically, the present application is a high-density photodiode arrays, with low dark current, low capacitance, high signal to noise ratio, high speed, and low crosstalk that can be fabricated on relatively large substrate wafers. More specifically the photodiode array of the present application is fabricated such that the PN-junctions are located on both the front side and back side surfaces of the array, and wherein the front side PN-junction is in electrical communication with the back side PN-junction. Still more specifically, the present application is a photodiode array having PN-junctions that are electrically connected from the front to back surfaces and which can be operated in a fully depleted mode at low reverse bias.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8686529
    Abstract: The present invention is directed toward a dual junction photodiode semiconductor devices with improved wavelength sensitivity. The photodiode employs a high quality n-type layer with relatively lower doping concentration and enables high minority carrier lifetime and high quantum efficiency with improved responsivity at multiple wavelengths. In one embodiment, the photodiode comprises a semiconductor substrate of a first conductivity type, a first impurity region of a second conductivity type formed epitaxially in the semiconductor substrate, a second impurity region of the first conductivity type shallowly formed in the epitaxially formed first impurity region, a first PN junction formed between the epitaxially formed first impurity region and the second impurity region, a second PN junction formed between the semiconductor substrate and the epitaxially formed first impurity region, and at least one passivated V-groove etched into the epitaxially formed first impurity region and the semiconductor substrate.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: April 1, 2014
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja, Manoocher Mansouri Aliabadi
  • Patent number: 8674401
    Abstract: This invention comprises photodiodes, optionally organized in the form of an array, including p+ deep diffused regions or p+ and n+ deep diffused regions. More specifically, the invention permits one to fabricate thin 4 inch and 6 inch wafer using the physical support provided by a n+ deep diffused layer and/or p+ deep diffused layer. Consequently, the present invention delivers high device performances, such as low crosstalk, low radiation damage, high speed, low leakage dark current, and high speed, using a thin active layer.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: March 18, 2014
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20140061843
    Abstract: The present specification discloses front-side contact back-side illuminated (FSC-BSL) photodiode array having improved characteristics such as high speed of each photodiode, uniformity of the bias voltage applied to different photodiode, low bias voltage, reduced resistance of each photodiode, and an associated reduction in noise. The photodiode array is made of photodiodes with front metallic cathode pads, front metallic anode pad, back metallic cathode pads, n+ doped regions and a p+ doped region. The front metallic cathode pads physically contact the n+ doped regions and the front metallic anode pad physically contacts the p+ doped region. The back metallic cathode pads physically contact the n+ doped region.
    Type: Application
    Filed: July 31, 2013
    Publication date: March 6, 2014
    Applicant: OSI Optoelectronics
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20130277786
    Abstract: The present invention is a photodiode and/or photodiode array, having a p+ diffused area that is smaller than the area of a mounted scintillator crystal, designed and manufactured with improved device characteristics, and more particularly, has relatively low dark current, low capacitance and improved signal-to-noise ratio characteristics. More specifically, the present invention is a photodiode and/or photodiode array that includes a metal shield for reflecting light back into a scintillator crystal, thus allowing for a relatively small p+ diffused area.
    Type: Application
    Filed: December 21, 2012
    Publication date: October 24, 2013
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20130256750
    Abstract: The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is formed directly atop the absorption layer, a plurality of cathode electrodes electrically coupled to the buffered layer or directly to the cap layer, and at least one anode electrode electrically coupled to a p-type region in the cap layer. The position sensing detector has a photo-response non-uniformity of less than 2% and a position detection error of less than 10 ?m across the active area.
    Type: Application
    Filed: February 13, 2013
    Publication date: October 3, 2013
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8519503
    Abstract: The present specification discloses front-side contact back-side illuminated (FSC-BSL) photodiode array having improved characteristics such as high speed of each photodiode, uniformity of the bias voltage applied to different photodiode, low bias voltage, reduced resistance of each photodiode, and an associated reduction in noise. The photodiode array is made of photodiodes with front metallic cathode pads, front metallic anode pad, back metallic cathode pads, n+ doped regions and a p+ doped region. The front metallic cathode pads physically contact the n+ doped regions and the front metallic anode pad physically contacts the p+ doped region. The back metallic cathode pads physically contact the n+ doped region.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: August 27, 2013
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8476725
    Abstract: The present invention is a front-side contact, back-side illuminated (FSC-BSL) photodiode arrays and front-side illuminated, back-side contact (FSL-BSC) photodiode arrays having improved characteristics, including high production throughput, low-cost manufacturing via implementation of batch processing techniques; uniform, as well as high, photocurrent density owing to presence of a large continuous homogeneous, heavily doped layer; and back to front intrachip connections via the homogenous, heavily doped layers on the front and back sides of the substrate.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: July 2, 2013
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8399909
    Abstract: The present invention is directed to a position sensing detector made of a photodiode having a semi insulating substrate layer; a buffered layer that is formed directly atop the semi-insulating substrate layer, an absorption layer that is formed directly atop the buffered layer substrate layer, a cap layer that is formed directly atop the absorption layer, a plurality of cathode electrodes electrically coupled to the buffered layer or directly to the cap layer, and at least one anode electrode electrically coupled to a p-type region in the cap layer. The position sensing detector has a photo-response non-uniformity of less than 2% and a position detection error of less than 10 ?m across the active area.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: March 19, 2013
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8338905
    Abstract: The present invention is a photodiode and/or photodiode array, having a p+ diffused area that is smaller than the area of a mounted scintillator crystal, designed and manufactured with improved device characteristics, and more particularly, has relatively low dark current, low capacitance and improved signal-to-noise ratio characteristics. More specifically, the present invention is a photodiode and/or photodiode array that includes a metal shield for reflecting light back into a scintillator crystal, thus allowing for a relatively small p+ diffused area.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: December 25, 2012
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8324670
    Abstract: This invention comprises plurality of edge illuminated photodiodes. More specifically, the photodiodes of the present invention comprise novel structures designed to minimize reductions in responsivity due to edge surface recombination and improve quantum efficiency. The novel structures include, but are not limited to, angled facets, textured surface regions, and appropriately doped edge regions.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: December 4, 2012
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja, Manoocher Mansouri
  • Patent number: 8278729
    Abstract: The present application is a photodiode detector array for use in computerized tomography (CT) and non-CT applications. Specifically, the present application is a high-density photodiode arrays, with low dark current, low capacitance, high signal to noise ratio, high speed, and low crosstalk that can be fabricated on relatively large substrate wafers. More specifically the photodiode array of the present application is fabricated such that the PN-junctions are located on both the front side and back side surfaces of the array, and wherein the front side PN-junction is in electrical communication with the back side PN-junction. Still more specifically, the present application is a photodiode array aving PN-junctions that are electrically connected from the front to back surfaces and which can be operated in a fully depleted mode at low reverse bias.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: October 2, 2012
    Assignee: UDT Sensors, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20120104532
    Abstract: The present application is directed to novel front side illuminated, back side contact photodiodes and arrays thereof. In one embodiment, the photodiode has a substrate with at least a first and a second side and a plurality of electrical contacts physically confined to the second side. The electrical contacts are in electrical communication with the first side through a doped region of a first type and a doped region of a second type, each of the regions substantially extending from the first side through to the second side. In another embodiment, the photodiode comprises a wafer with at least a first and a second side; and a plurality of electrical contacts physically confined to the second side, where the electrical contacts are in electrical communication with the first side through a diffusion of a p+ region through the wafer and a diffusion of an n+ region through the wafer.
    Type: Application
    Filed: September 29, 2011
    Publication date: May 3, 2012
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8164151
    Abstract: The present invention is directed toward a detector structure, detector arrays, and a method of detecting incident radiation. The present invention comprises a photodiode array and method of manufacturing a photodiode array that provides for reduced radiation damage susceptibility, decreased affects of crosstalk, reduced dark current (current leakage) and increased flexibility in application.
    Type: Grant
    Filed: May 7, 2007
    Date of Patent: April 24, 2012
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20120086097
    Abstract: The present application is a photodiode detector array for use in computerized tomography (CT) and non-CT applications. Specifically, the present application is a high-density photodiode arrays, with low dark current, low capacitance, high signal to noise ratio, high speed, and low crosstalk that can be fabricated on relatively large substrate wafers. More specifically the photodiode array of the present application is fabricated such that the PN junctions are located on both the front side and back side surfaces of the array, and wherein the front side PN-junction is in electrical communication with the back side PN-junction. Still more specifically, the present application is a photodiode array aving PN junctions that are electrically connected from the front to back surfaces and which can be operated in a fully depleted mode at low reverse bias.
    Type: Application
    Filed: September 29, 2011
    Publication date: April 12, 2012
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20120061788
    Abstract: The present invention is directed toward a dual junction photodiode semiconductor device. The photodiode has a semiconductor substrate of a first conductivity type, a first impurity region of a second conductivity type shallowly diffused on the front side of the semiconductor substrate, a second impurity region of the second conductivity type shallowly diffused on the back side of the semiconductor substrate, a first PN junction formed between the first impurity region and the semiconductor substrate, and a second PN junction formed between the second impurity region and the semiconductor substrate. Since light beams of a shorter wavelength are absorbed near the surface of a semiconductor, while light beams of a longer wavelength reach deeper sections, the two PN junctions at front and back sides of the photodiode allow the device to be used as an adjustable low pass or high pass wavelength filter detector.
    Type: Application
    Filed: September 2, 2011
    Publication date: March 15, 2012
    Inventors: Peter Steven Bui, Narayan Dass Taneja, Manoocher Mansouri Aliabadi
  • Patent number: 8120023
    Abstract: The present invention is directed to novel front side illuminated, back side contact photodiodes and arrays thereof. In one embodiment, the photodiode has a substrate with at least a first and a second side and a plurality of electrical contacts physically confined to the second side. The electrical contacts are in electrical communication with the first side through a doped region of a first type and a doped region of a second type, each of the regions substantially extending from the first side through to the second side. In another embodiment, the photodiode comprises a wafer with at least a first and a second side; and a plurality of electrical contacts physically confined to the second side, where the electrical contacts are in electrical communication with the first side through a diffusion of a p+ region through the wafer and a diffusion of an n+ region through the wafer.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: February 21, 2012
    Assignee: UDT Sensors, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20110278690
    Abstract: The present invention is a front-side contact, back-side illuminated (FSC-BSL) photodiode arrays and front-side illuminated, back-side contact (FSL-BSC) photodiode arrays having improved characteristics, including high production throughput, low-cost manufacturing via implementation of batch processing techniques; uniform, as well as high, photocurrent density owing to presence of a large continuous homogeneous, heavily doped layer; and back to front intrachip connections via the homogenous, heavily doped layers on the front and back sides of the substrate.
    Type: Application
    Filed: May 18, 2011
    Publication date: November 17, 2011
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8049294
    Abstract: The present invention is a photodiode detector array for use in computerized tomography (CT) and non-CT applications. Specifically, the present invention is a high-density photodiode arrays, with low dark current, low capacitance, high signal to noise ratio, high speed, and low crosstalk that can be fabricated on relatively large substrate wafers. More specifically the photodiode array of the present invention is fabricated such that the PN-junctions are located on both the front side and back side surfaces of the array, and wherein the front side PN-junction is in electrical communication with the back side PN-junction. Still more specifically, the present invention is a photodiode array awing PN-junctions that are electrically connected from the front to back surfaces and which can be operated in a fully depleted mode at low reverse bias.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: November 1, 2011
    Assignee: UDT Sensors, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20110248369
    Abstract: The present invention is a photodiode and/or photodiode array, having a p+ diffused area that is smaller than the area of a mounted scintillator crystal, designed and manufactured with improved device characteristics, and more particularly, has relatively low dark current, low capacitance and improved signal-to-noise ratio characteristics. More specifically, the present invention is a photodiode and/or photodiode array that includes a metal shield for reflecting light back into a scintillator crystal, thus allowing for a relatively small p+ diffused area.
    Type: Application
    Filed: April 12, 2011
    Publication date: October 13, 2011
    Inventors: Peter Steven Bui, Narayan Dass Taneja