Patents by Inventor Narender Reddy Vangati

Narender Reddy Vangati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7930691
    Abstract: Improved techniques are disclosed for performing an in-service upgrade of software associated with a network or packet processor. By way of example, a method of managing data structures associated with code executable on a packet processor includes the following steps. Data structures in the code are identified as being one of static data structures and non-static data structures, wherein a static data structure includes a data structure that is not changed during execution of the packet processor code and a non-static data structure includes a data structure that is changed during execution of the packet processor code. One or more data structures associated with the packet processor code are managed in a manner specific to the identification of the one or more data structures as static data structures or non-static data structures. At least a portion of the data structures may include tree structures.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: April 19, 2011
    Assignee: Agere Systems Inc.
    Inventors: Rajarshi Bhattacharya, David P. Sonnier, Narender Reddy Vangati
  • Patent number: 7802245
    Abstract: Improved techniques are disclosed for performing an in-service upgrade of software associated with a network or packet processor. By way of example, a method of performing an in-service upgrade of code, storable in a memory associated with a packet processor and executable on the packet processor, from a first code version to a second code version, includes the following steps. A first step includes preparing for the upgrade by generating one or more write operations to effectuate the code upgrade from the first code version to the second code version. A second step includes updating the code from the first code version to the second code version by propagating the one or more write operations to the packet processor. A third step includes cleaning up after the updating step by reclaiming one or more memory locations available after the update step. As such, the storage of only a single version of the code in the memory associated with the packet processor is required.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: September 21, 2010
    Assignee: Agere Systems Inc.
    Inventors: David P. Sonnier, Narender Reddy Vangati