Patents by Inventor Naresh Kumar Yadav

Naresh Kumar Yadav has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Processor instructions for accelerating video coding
    Patent number: 10397591
    Abstract: A control processor for a video encode-decode engine is provided that includes an instruction pipeline. The instruction pipeline includes an instruction fetch stage coupled to an instruction memory to fetch instructions, an instruction decoding stage coupled to the instruction fetch stage to receive the fetched instructions, and an execution stage coupled to the instruction decoding stage to receive and execute decoded instructions. The instruction decoding stage and the instruction execution stage are configured to decode and execute a set of instructions in an instruction set of the control processor that are designed specifically for accelerating video sequence encoding and encoded video bit stream decoding.
    Type: Grant
    Filed: April 11, 2015
    Date of Patent: August 27, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dipan Kumar Mandal, Mihir Narendra Mody, Mahesh Madhukar Mehendale, Chaitanya Satish Ghone, Piyali Goswami, Naresh Kumar Yadav, Hetul Sanghvi, Niraj Nandan
  • Processor Instructions for Accelerating Video Coding
    Publication number: 20150296212
    Abstract: A control processor for a video encode-decode engine is provided that includes an instruction pipeline. The instruction pipeline includes an instruction fetch stage coupled to an instruction memory to fetch instructions, an instruction decoding stage coupled to the instruction fetch stage to receive the fetched instructions, and an execution stage coupled to the instruction decoding stage to receive and execute decoded instructions. The instruction decoding stage and the instruction execution stage are configured to decode and execute a set of instructions in an instruction set of the control processor that are designed specifically for accelerating video sequence encoding and encoded video bit stream decoding.
    Type: Application
    Filed: April 11, 2015
    Publication date: October 15, 2015
    Inventors: Dipan Kumar Mandal, Mihir Narendra Mody, Mahesh Madhukar Mehendale, Chaitanya Satish Ghone, Piyali Goswami, Naresh Kumar Yadav, Hetul Sanghvi, Niraj Nandan