Patents by Inventor Nariaki Hirano

Nariaki Hirano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4615006
    Abstract: An expanded memory field is obtained by forming a physical address for accessing a main memory unit according to the present invention. The physical address is developed following an address-mode provided in an instruction including an address field. When the address-mode is a "1", physical address is provided by (i) obtaining a base offset address from a base register which is given by a base register bank as determined by a first field of the address field, and (ii) adding the base address to a displacement number determined by a second field of the address to obtain an offset address, (iii) obtaining a segment base address from a segment base address register corresponding to a segment number register determined by the first field of the address, and (iv) adding together the segment base address and the offset address. A 24 bit physical address is obtained. When the address-mode is a "0", the address field constitutes the offset address and the above additions are carried out.
    Type: Grant
    Filed: December 18, 1984
    Date of Patent: September 30, 1986
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Nariaki Hirano