Patents by Inventor Naruhito HOKA

Naruhito HOKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11126049
    Abstract: The display apparatus includes a plurality of gate lines, a plurality of vertical gate lines orthogonal to the gate lines, and a plurality of connection parts, each of which connects one of the gate lines and corresponding one of the vertical gate lines. The plurality of vertical gate lines extend from a first side in the display region. At least the gate line disposed closest to the first side is connected to the corresponding vertical gate line by a plurality of connection parts disposed at two or more locations.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: September 21, 2021
    Assignee: Trivale Technologies LLC
    Inventors: Tatsuya Baba, Takafumi Hashiguchi, Naruhito Hoka, Naoya Hirata
  • Patent number: 10831295
    Abstract: It is an object of the present invention to reduce an offset of an electrostatic capacitance and suppress a bias of detection sensitivity in a touch screen having a narrowed frame. A touch screen of the present invention includes a plurality of detection row wirings extending in a row direction, a plurality of detection column wirings, a plurality of lead wirings electrically connecting the plurality of detection row wirings and the plurality of detection column wirings to a terminal and being disposed to be drawn close to each other, and an outermost peripheral shielded wiring which surrounds the detection area along a further outer side of the outermost lead wirings and is connected to the terminal. There is a region which does not include an interlayer insulating film in a region between the detection area or the plurality of lead wirings and the outermost peripheral shielded wiring.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: November 10, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Naruhito Hoka, Tatsuya Nakamura
  • Patent number: 10782579
    Abstract: First and second gate lines respectively extend in first and second directions in a display area. The second gate line is electrically connected to the first gate line and extends in the second direction in the display area. The second gate line is electrically connected to the first gate line outside the display area. A conductive layer may be disposed between the second gate line and a source line, and the second gate line may be electrically connected to the first gate line in the display area. To the conductive layer, a potential identical to a common potential or a ground potential is applied. An arrangement where two or more second gate lines overlap the source line may be employed. Transition of a potential of a gate signal from an on potential to an off potential may be made in two or more stages.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: September 22, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takafumi Hashiguchi, Naoya Hirata, Tatsuya Baba, Manabu Tanahara, Naruhito Hoka
  • Publication number: 20200174329
    Abstract: The display apparatus includes a plurality of gate lines, a plurality of vertical gate lines orthogonal to the gate lines, and a plurality of connection parts, each of which connects one of the gate lines and corresponding one of the vertical gate lines. The plurality of vertical gate lines extend from a first side in the display region. At least the gate line disposed closest to the first side is connected to the corresponding vertical gate line by a plurality of connection parts disposed at two or more locations.
    Type: Application
    Filed: November 26, 2019
    Publication date: June 4, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tatsuya BABA, Takafumi HASHIGUCHI, Naruhito HOKA, Naoya HIRATA
  • Patent number: 10656482
    Abstract: A channel layer is formed of an oxide semiconductor. A first insulating film is provided on the channel layer, a source line, and a drain electrode, and includes a drain contact hole which reaches the drain electrode. A pixel electrode is provided on the first insulating film, includes a connection conductive layer which is connected to the drain electrode by the drain contact hole, and is formed of a transparent conductive material. The pixel electrode is covered with a second insulating film. A common electrode is provided on the second insulating film, includes an opening which faces the pixel electrode in a thickness direction, and is formed of a transparent conductive material. A metal layer, in conjunction with a part of the common electrode, forms a laminated structure, and includes a light-shield part which overlaps the channel layer at least partially in plan view.
    Type: Grant
    Filed: May 8, 2017
    Date of Patent: May 19, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinji Kawabuchi, Naruhito Hoka, Kazushi Yamayoshi, Akihiko Hosono, Kenichi Miyamoto
  • Patent number: 10578929
    Abstract: Provided is a liquid crystal display panel including a first pixel that is brought into abutment against a photospacer, second pixels having opening regions of the same color as a color of an opening region of the first pixel, and third pixels being other pixels and having the largest area of opening regions. A distance between a photospacer set position and a through-hole in each pixel is larger in the first pixel and in the second pixels than in the third pixels.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: March 3, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Naruhito Hoka, Kazunori Okumoto, Manabu Tanahara
  • Publication number: 20190384132
    Abstract: First and second gate lines respectively extend in first and second directions in a display area. The second gate line is electrically connected to the first gate line and extends in the second direction in the display area. The second gate line is electrically connected to the first gate line outside the display area. A conductive layer may be disposed between the second gate line and a source line, and the second gate line may be electrically connected to the first gate line in the display area. To the conductive layer, a potential identical to a common potential or a ground potential is applied. An arrangement where two or more second gate lines overlap the source line may be employed. Transition of a potential of a gate signal from an on potential to an off potential may be made in two or more stages.
    Type: Application
    Filed: June 5, 2019
    Publication date: December 19, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takafumi HASHIGUCHI, Naoya HIRATA, Tatsuya BABA, Manabu TANAHARA, Naruhito HOKA
  • Patent number: 10466526
    Abstract: A liquid crystal display device is equipped with: a TFT array substrate having a thin film transistor in each of pixel areas; and a counter substrate having a black matrix in which an opening part is formed in each of areas corresponding to the pixel areas. The TFT array substrate includes: a protective film formed on a drain electrode of the thin film transistor; a contact hole formed in the protective film so as to reach the drain electrode; and a pixel electrode formed on the protective film and connected to the drain electrode through the contact hole. An inner wall of the contact hole includes a first sloped part and a second sloped part which are arranged in line in a circumferential direction of the contact hole and have slope angles different from each other.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: November 5, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Naruhito Hoka, Manabu Tanahara, Takeshi Sonoda
  • Publication number: 20190004656
    Abstract: It is an object of the present invention to reduce an offset of an electrostatic capacitance and suppress a bias of detection sensitivity in a touch screen having a narrowed frame. A touch screen of the present invention includes a plurality of detection row wirings extending in a row direction, a plurality of detection column wirings, a plurality of lead wirings electrically connecting the plurality of detection row wirings and the plurality of detection column wirings to a terminal and being disposed to be drawn close to each other, and an outermost peripheral shielded wiring which surrounds the detection area along a further outer side of the outermost lead wirings and is connected to the terminal. There is a region which does not include an interlayer insulating film in a region between the detection area or the plurality of lead wirings and the outermost peripheral shielded wiring.
    Type: Application
    Filed: February 16, 2017
    Publication date: January 3, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Naruhito HOKA, Tatsuya NAKAMURA
  • Publication number: 20180356667
    Abstract: Provided is a liquid crystal display panel including a first pixel that is brought into abutment against a photospacer, second pixels having opening regions of the same color as a color of an opening region of the first pixel, and third pixels being other pixels and having the largest area of opening regions. A distance between a photospacer set position and a through-hole in each pixel is larger in the first pixel and in the second pixels than in the third pixels.
    Type: Application
    Filed: May 7, 2018
    Publication date: December 13, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Naruhito HOKA, Kazunori OKUMOTO, Manabu TANAHARA
  • Patent number: 10139688
    Abstract: In an FFS liquid crystal display in which a dummy pixel in a dummy pixel region is smaller than a display pixel in a display region, a slit is formed in a common electrode in the display pixel while no slit is formed in the common electrode in the dummy pixel.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: November 27, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takafumi Hashiguchi, Naruhito Hoka, Naoya Hirata
  • Publication number: 20180210278
    Abstract: A liquid crystal display device is equipped with: a TFT array substrate having a thin film transistor in each of pixel areas; and a counter substrate having a black matrix in which an opening part is formed in each of areas corresponding to the pixel areas. The TFT array substrate includes: a protective film formed on a drain electrode of the thin film transistor; a contact hole formed in the protective film so as to reach the drain electrode; and a pixel electrode formed on the protective film and connected to the drain electrode through the contact hole. An inner wall of the contact hole includes a first sloped part and a second sloped part which are arranged in line in a circumferential direction of the contact hole and have slope angles different from each other.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 26, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Naruhito HOKA, Manabu TANAHARA, Takeshi SONODA
  • Publication number: 20170351152
    Abstract: In an FFS liquid crystal display in which a dummy pixel in a dummy pixel region is smaller than a display pixel in a display region, a slit is formed in a common electrode in the display pixel while no slit is formed in the common electrode in the dummy pixel.
    Type: Application
    Filed: May 4, 2017
    Publication date: December 7, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takafumi HASHIGUCHI, Naruhito HOKA, Naoya HIRATA
  • Publication number: 20170329176
    Abstract: A channel layer is formed of an oxide semiconductor. A first insulating film is provided on the channel layer, a source line, and a drain electrode, and includes a drain contact hole which reaches the drain electrode. A pixel electrode is provided on the first insulating film, includes a connection conductive layer which is connected to the drain electrode by the drain contact hole, and is formed of a transparent conductive material. The pixel electrode is covered with a second insulating film. A common electrode is provided on the second insulating film, includes an opening which faces the pixel electrode in a thickness direction, and is formed of a transparent conductive material. A metal layer, in conjunction with a part of the common electrode, forms a laminated structure, and includes a light-shield part which overlaps the channel layer at least partially in plan view.
    Type: Application
    Filed: May 8, 2017
    Publication date: November 16, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinji KAWABUCHI, Naruhito HOKA, Kazushi YAMAYOSHI, Akihiko HOSONO, Kenichi MIYAMOTO
  • Patent number: 9733530
    Abstract: The present invention includes a thin-film transistor, a flattened film having a flattened top surface and having a contact hole formed thereon, and a pixel electrode and a common line which are disposed on the top surface of the flattened film. The common line includes a common metal line, and the pixel electrode has a connection portion formed in the contact hole and electrically connected to the thin-film transistor. The connection portion of the pixel electrode includes a connection metal film made of the material same as the material for the common metal line of the common line.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: August 15, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazushi Yamayoshi, Naruhito Hoka, Osamu Miyakawa, Shinsuke Ogata
  • Patent number: 9690154
    Abstract: A liquid crystal display panel includes: a transparent insulating substrate; a signal line and a scanning line arranged in a display region on the transparent insulating substrate and crossing each other in a matrix; a protective insulating film arranged so as to cover at least the signal line and the scanning line from above; a first insulating film that covers the protective insulating film from above; and a first contact hole that penetrates at least the first insulating film and the protective insulating film to reach a surface of a common interconnect. The first contact hole has a bottom and an inner side surface covered with a first stacked film composed of a first transparent conductive film made of the same material as the lower electrode and a second transparent conductive film made of the same material as the upper electrode.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: June 27, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazushi Yamayoshi, Osamu Miyakawa, Takeshi Sonoda, Shinsuke Ogata, Takeshi Shimamura, Naruhito Hoka
  • Patent number: 9690151
    Abstract: A liquid crystal panel includes an array substrate and a counter substrate facing the array substrate that are bonded to each other through a seal located along a peripheral edge. Vcom wiring and GND wiring are provided in a peripheral region of the array substrate. The Vcom wiring is provided between a display region and the GND wiring. The GND wiring extends beyond an edge of the seal.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: June 27, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takafumi Hashiguchi, Takeshi Shimamura, Naruhito Hoka, Hirofumi Iwanaga
  • Patent number: 9666608
    Abstract: An array substrate includes a first electrode located above a switching element through a first insulating film, a second electrode located above the first electrode through a second insulating film, and a connection portion that is located to pass through the first insulating film, first electrode, and second insulating film and electrically connects a drain electrode of the switching element and the second electrode. The connection portion is disposed in an avoidance region provided by carving out a gate line connected to the switching element.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: May 30, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Naruhito Hoka, Manabu Tanahara, Takeshi Shimamura
  • Publication number: 20160062193
    Abstract: The present invention includes a thin-film transistor, a flattened film having a flattened top surface and having a contact hole formed thereon, and a pixel electrode and a common line which are disposed on the top surface of the flattened film. The common line includes a common metal line, and the pixel electrode has a connection portion formed in the contact hole and electrically connected to the thin-film transistor. The connection portion of the pixel electrode includes a connection metal film made of the material same as the material for the common metal line of the common line.
    Type: Application
    Filed: August 14, 2015
    Publication date: March 3, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazushi YAMAYOSHI, Naruhito HOKA, Osamu MIYAKAWA, Shinsuke OGATA
  • Publication number: 20150241746
    Abstract: A liquid crystal panel includes an array substrate and a counter substrate facing the array substrate that are bonded to each other through a seal located along a peripheral edge. Vcom wiring and GND wiring are provided in a peripheral region of the array substrate. The Vcom wiring is provided between a display region and the GND wiring. The GND wiring extends beyond an edge of the seal.
    Type: Application
    Filed: February 11, 2015
    Publication date: August 27, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takafumi HASHIGUCHI, Takeshi SHIMAMURA, Naruhito HOKA, Hirofumi IWANAGA