Abstract: A back-side illuminated solid-state imaging device includes a photodiode and MOS transistors at a semiconductor substrate. The MOS transistors are formed over the front surface of the semiconductor substrate. The photodiode responds to an incident light applied to the back surface opposite to the front surface of the semiconductor substrate. A charge storing portion, and a first and second transfer gates are formed over the main part of the photodiode and the front surface of the semiconductor substrate located above the vicinity of the main part so as to achieve the global shutter function. Since the irradiation light is incident on the photodiode from the back surface of the semiconductor substrate in back-side illuminated solid-state imaging device, the sensitivity of the photodiode is not reduced even when the first and second transfer gates, and the charge storing portion are formed to achieve the global shutter function.

Abstract: To input buffers included in a peripheral pad group inputting an external signal and a DQ pad group for data input/output, clock signals from a synchronizing circuit are transmitted through a clock distributing circuit having a plurality of clock transmission nodes arranged in a shape of a tree. The synchronizing circuit accomplishes phase synchronization between a signal from a node nearest to the clock distributing circuit with an external clock signal. Thus, a skew in clock signals applied to the input and output buffers can be eliminated.

Abstract: A DRAM includes a semiconductor substrate and unit blocks. Each unit block includes a peripheral circuit and eight memory blocks arranged to surround the peripheral circuit. Each memory block includes a plurality of word lines, a plurality of bit lines, a plurality of memory cells, a row decoder, and a column decoder.

Abstract: A fuzzy development-support device includes a data input unit, a fuzzy-inference execution unit and a result verification unit. As an example, the data input unit includes a display unit connected to a membership function generator and a grid pitch designation unit for designating a grid pitch on a grid sheet displayed on the display unit for creation of membership functions. The grid pitch designation unit allows variation of grid pitch on the grid sheet. Thus, an operator uses the grid pitch designation unit to achieve an effective input of membership functions by generating the grid sheet with a pitch adequate for a desired shape of membership function.

Abstract: Apparatus is disclosed for a self-test function internal to a semiconductor integrated circuit. The invention includes an internal random number generator for generating test data for use by a self-test program. As a result of the invention, external equipment is not necessary for executing the self-test, internal memory for storing for self-test data can be decreased, and self-test can be performed readily by the user. Furthermore, since self-test result data is compressed so as to be compared with the data of prediction values, the data of the test result can be reduced for easy processing.

Abstract: A multiple digit comparator checks the first and the second input data for a match. If the two input data match, the carry input data from the previous digit is outputted as the carry output data for the next digit; if the two input data do not match, then a no match signal is outputted as the carry output data for the next digit. Next, if the carry input data and the carry output data do not match then a change point signal is outputted. When this change point signal is outputted, the first and the second input data are outputted. This facilitates the design of a more regular comparator circuit layout and of a faster comparator circuit.

Abstract: A semiconductor integrated circuit includes an auxiliary instruction register group having a plurality of auxiliary instruction registers capable of setting in advance the content by a program, and one of the auxiliary instruction register selected by the output of the decoder or controls a portion of the semiconductor integrated circuit that is not controlled by the instruction of the instruction register or controls a portion while cooperating with the instruction register. Thus, the integrated circuit can effectively perform a control of large degree of freedoms in a short instruction register.