Abstract: The invention relates to a layout modification engine (18) for modifying a circuit layout (1) comprising layout entities including a fixed layout entity and free layout entities. The layout entities are a representation of at least part of an integrated circuit, each layout entity comprises at least one layout element. The fixed layout entity is restrained to a predefined position. The layout modification engine comprises the conflict-solver for resolving conflicts between the fixed layout entity and the free layout entities. The conflict-solver comprises a layout analyzer (14) and a conflict-solving-module (16). The conflict-solving module generates a set of fixed layout elements for resolving the detected conflict. Because the layout modification engine converts the fixed layout entity into the set of fixed layout elements, the layout modification engine will encounter less conflict situations while modifying the circuit layout which reduces the processing time.

Abstract: A data processing apparatus executes a program. A number of operations has to be executed at a data dependent points in time. This is implemented by executing a data independent series of instructions at data independent points in time. The series of instructions includes instructions whose completion is dependent on data dependent conditions. Using the conditions it is selected which of the executed instructions cause the operations to be executed. FIG.

Abstract: A data processing device is described which at least comprises a master controller (1), a first functional unit (2) which includes a slave controller (20), a second functional unit (3). The functional units (2,3) share common memory means (11). The device is programmed for executing an instruction by the first functional unit (2), the execution of said instruction involving input/output operations by the first functional unit (3), wherein output data of the first functional unit (2) is processed by the second functional unit (3) during said execution and/or the input data is generated by the second functional (3) unit during said execution.