Patents by Inventor Natan Shtutman

Natan Shtutman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pixel clocking method and apparatus
    Patent number: 9760333
    Abstract: An apparatus includes a clock circuit and a virtual pixel clock circuit. The clock circuit provides a common clock signal. The virtual pixel clock circuit provides a plurality of pixel clock signals in response to the common clock signal. One of the virtual pixel clock signals is at a different clock speed than another of the plurality of virtual pixel clock signals.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: September 12, 2017
    Assignee: ATI Technologies ULC
    Inventors: David I. J. Glen, Collis Quinn Carter, Natan Shtutman, Gabriel Abarca, Jonathan Wang
  • Display link clocking method and apparatus
    Patent number: 9348355
    Abstract: An apparatus includes a clock circuit and a plurality of display interface circuits. The clock circuit provides a common clock signal. The display interface circuits each provide a respective display link clock signal in response to the common clock signal. One of the display link clock signals is at a different clock speed that another of the display link clock signals.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: May 24, 2016
    Assignee: ATI Technologies ULC
    Inventors: David I. J. Glen, Collis Quinn Carter, Natan Shtutman, Ngar Sze Nancy Chan, Michael Foxcroft
  • Methods and systems to reduce display artifacts when changing display clock rate
    Patent number: 9070198
    Abstract: Methods, systems, and computer readable media embodiments for reducing or eliminating display artifacts caused by on-the-fly changing of the display clock are disclosed. According to an embodiment of the present invention, a method includes, changing a rate of a display clock, and adapting a display data processing pipeline clocked by the display clock to prevent a substantial change in a pixel output rate from the display data processing pipeline based upon the changing.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: June 30, 2015
    Assignee: ATI Technologies ULC
    Inventors: Collis Quinn Carter, Natan Shtutman, Jonathan Wang, Stephen Ho, Nicholas James Chorney
  • Methods and Systems to Reduce Display Artifacts When Changing Display Clock Rate
    Publication number: 20130083043
    Abstract: Methods, systems, and computer readable media embodiments for reducing or eliminating display artifacts caused by on-the-fly changing of the display clock are disclosed. According to an embodiment of the present invention, a method includes, changing a rate of a display clock, and adapting a display data processing pipeline clocked by the display clock to prevent a substantial change in a pixel output rate from the display data processing pipeline based upon the changing.
    Type: Application
    Filed: May 31, 2012
    Publication date: April 4, 2013
    Applicant: ATI Technologies ULC
    Inventors: Collis Quinn CARTER, Natan Shtutman, Jonathan Wang, Stephen Ho, Nicholas James Chorney
  • DISPLAY LINK CLOCKING METHOD AND APPARATUS
    Publication number: 20110050314
    Abstract: An apparatus includes a clock circuit and a plurality of display interface circuits. The clock circuit provides a common clock signal. The display interface circuits each provide a respective display link clock signal in response to the common clock signal. One of the display link clock signals is at a different clock speed that another of the display link clock signals.
    Type: Application
    Filed: August 24, 2010
    Publication date: March 3, 2011
    Applicant: ATI TECHNOLOGIES ULC
    Inventors: David I.J. Glen, Collis Quinn Carter, Natan Shtutman, Ngar Sze Nancy Chan, Michael Foxcroft
  • PIXEL CLOCKING METHOD AND APPARATUS
    Publication number: 20110050709
    Abstract: An apparatus includes a clock circuit and a virtual pixel clock circuit. The clock circuit provides a common clock signal. The virtual pixel clock circuit provides a plurality of pixel clock signals in response to the common clock signal. One of the virtual pixel clock signals is at a different clock speed than another of the plurality of virtual pixel clock signals.
    Type: Application
    Filed: August 24, 2010
    Publication date: March 3, 2011
    Applicant: ATI TECHNOLOGIES ULC
    Inventors: David I.J. Glen, Collis Quinn Carter, Natan Shtutman, Gabriel Abarca, Jonathan Wang