Abstract: A host Ethernet adapter (HEA) and method of managing network communications is provided. The HEA includes a host interface configured for communication with a multi-core processor over a processor bus. The host interface comprises a receive processing element including a receive processor, a receive buffer and a scheduler for dispatching packets from the receive buffer to the receive processor; a send processing element including a send processor and a send buffer; and a completion queue scheduler (CQS) for dispatching completion queue elements (CQE) from the head of the completion queue (CQ) to threads of the multi-core processor in a network node mode.

Abstract: A technique for generating a compacted binary identifier includes breaking an original binary identifier into equal parts. Each bit of a first one of the parts is exclusive ORed with a start-up value to generate a first result. Each bit of the first result is exclusive ORed with a respective bit of a second one of the parts to generate a second result.

Abstract: The invention provides a method for adding specific hardware on both receive and transmit sides that will hide to the software most of the effort related to buffer and pointers management. At initialization, a set of pointers and buffers is provided by software, in quantity large enough to support expected traffic. A Send Queue Replenisher (SQR) and Receive Queue Replenisher (RQR) hide RQ and SQ management to software. RQR and SQR fully monitor pointers queues and perform recirculation of pointers from transmit side to receive side.

Abstract: Apparatuses and methods to manage a global forwarding table in a distributed switch are provided. A particular method may include managing a global forwarding table in a distributed switch. The distributed switch may include a plurality of switch forwarding units. The method may start a timer for an entry in the global forwarding table, and the entry may include a multicast destination address and corresponding multicast membership information. The method may also, in response to expiration of the timer of the entry, check at least one hit status to determine whether at least one switch forwarding unit of the plurality of switch forwarding units has forwarded multicast data to the corresponding multicast membership information of the multicast destination address of the entry. The method may further determine whether the entry is a cast-out candidate based on the hit status.

Abstract: Apparatuses and methods to request multicast membership information in a distributed switch are provided. A particular method may include requesting multicast membership information of a group identified by a multicast destination address in a distributed switch. The distributed switch may include a plurality of distributed switch elements with a plurality of switch forwarding units. The method may generate a miss event indicating that the multicast destination address is unregistered in a switch forwarding unit of a distributed switch element and there is a need for the multicast membership information. The method may also request the multicast membership information of the multicast destination address in response to the miss event. The method may further initiate a query for the multicast membership information of the multicast destination address in response to the request.

Abstract: A mechanism is provided for merging in a network processor results from a parser and results from an external coprocessor providing processing support requested by said parser. The mechanism enqueues in a result queue both parser results needing to be merged with a coprocessor result and parser results which have no need to be merged with a coprocessor result. An additional queue is used to enqueue the addresses of the result queue where the parser results are stored. The result from the coprocessor is received in a simple response register. The coprocessor result is read by the result queue management logic from the response register and merged to the corresponding incomplete parser result read in the result queue at the address enqueued in the additional queue.

Abstract: A method, a system, and a computer program product is disclosed for identifying a quality of service (QoS) classification of a packet in a network by a network processor. The method comprising: providing a table wherein a priority value with a maximum of N values is used as an index into the table to retrieve a QoS classification having a maximum of M values with M less than N; receiving a data packet in a stream of data packets; extracting at least two priority indicator values from the packet; converting the at least two priority indicator values into a priority value; utilizing the priority value as an index into the table; extracting the entry in the table corresponding to the priority value as the QoS classification of the packet; and utilizing the QoS classification for subsequent processing of the data packet.

Abstract: According to embodiments of the invention, there is provided a method for operating a network processor. The network processor receiving a first data packet in a stream of data packets and a set of receive-queues adapted to store receive data packets. The network processor processing the first data packet by reading a flow identification in the first data packet; determining a quality of service for the first data packet; mapping the flow identification and the quality of service into an index for selecting a first receive-queue for routing the first data packet; and utilizing the index to route the first data packet to the first receive-queue.

Abstract: Disclosed a method for validating a data packet by a network processor supporting a first, network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet: identities a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The method produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The method validates the data packet by comparing the data packet checksum to the second checksum.

Abstract: A mechanism is provided for merging in a network processor results from a parser and results from an external coprocessor providing processing support requested by said parser. The mechanism enqueues in a result queue both parser results needing to be merged with a coprocessor result and parser results which have no need to be merged with a coprocessor result. An additional queue is used to enqueue the addresses of the result queue where the parser results are stored. The result from the coprocessor is received in a simple response register. The coprocessor result is read by the result queue management logic from the response register and merged to the corresponding incomplete parser result read in the result queue at the address enqueued in the additional queue.

Abstract: A mechanism is provided for sharing a communication used by a parser (parser path) in a network adapter of a network processor for sending requests for a process to be executed by an external coprocessor. The parser path is shared by processors of the network processor (software path) to send requests to the external processor. The mechanism uses for the software path a request mailbox comprising a control address and a data field accessed by MMIO for sending two types of messages, one message type to read or write resources and one message type to trigger an external process in the coprocessor and a response mailbox for receiving response from the external coprocessor comprising a data field and a flag field. The other processors of the network poll the flag until set and get the coprocessor result in the data field.

Abstract: A host Ethernet adapter (HEA) and method of managing network communications is provided. The HEA includes a host interface configured for communication with a multi-core processor over a processor bus. The host interface comprises a receive processing element including a receive processor, a receive buffer and a scheduler for dispatching packets from the receive buffer to the receive processor; a send processing element including a send processor and a send buffer; and a completion queue scheduler (CQS) for dispatching completion queue elements (CQE) from the head of the completion queue (CQ) to threads of the multi-core processor in a network node mode.

Abstract: Apparatus for providing a checksum in a network transmission. In one aspect of the invention, a checksum for a packet to be transmitted on a network is determined by retrieving packet information from a storage device, the packet information to be included in the packet to be transmitted. A blind checksum value is determined based on the retrieved packet information, and the blind checksum value is adjusted to a protocol checksum based on descriptor information describing the structure of the packet. The protocol checksum is inserted in the packet before the packet is transmitted.

Abstract: The CRC for the CPS Header of an ATM AAL2 cell is generated by a CRC generator which uses the 8 bits of the CID field to generate partial 5 bits CRCs which are loaded in a first table. The 6 bits LI field and 5 bits UUI field are added to the partial 5 bits CRC to form 16 bits. The CRC generator uses the 2.sup.16 bits to generate a second CRC table. The CRC for a particular CPS header is generated by correlating bits in the CID field, LI field and UUI field with the two tables.

Abstract: According to embodiments of the invention, there is provided a method, a system, and a computer program product for operating a network processor. The network processor processing a received data packet by reading a flow identification in the data packet; determining a quality of service criteria (QoSC) for the data packet; mapping the flow identification and the QoSC into an index for selecting a receive-queue for routing the data packet; and utilizing the index to route the data packet to the receive-queue.

Abstract: A network packet includes a packet key that includes one or more source-destination field pairs that each include a source field and a destination field. For each selected source-destination field pair, first and second sections are selected in the packet key. A source field value is extracted from the source field and a destination field value is extracted from the destination field. For each source bit of the source field value: a destination bit is selected from the destination field; an OR logic function is applied to the source bit and the destination bit to generate a first resulting value stored at the same bit position as the source bit in the first section; an AND logic function is applied to the source bit and the destination bit to generate a second resulting value stored at the same bit position as the source bit in the second section.

Abstract: A technique for generating a compacted binary identifier includes breaking an original binary identifier into equal parts. Each bit of a first one of the parts is exclusive ORed with a start-up value to generate a first result. Each bit of the first result is exclusive ORed with a respective bit of a second one of the parts to generate a second result.

Abstract: A technique for analyzing network packets includes receiving, by a network processor, a network packet having a packet header including address and control information. A set of bytes are extracted, using the network processor, from the packet header and a set of input bits for generating a hash code are derived, using the network processor, from the set of bytes. Finally, the hash code is generated using the input bits.

Abstract: Disclosed is a method and system for validating a data packet by a network processor supporting a first network protocol and a second network protocol and utilizing shared hardware. The network processor receives a data packet; identifies a network packet protocol for the data packet; and processes the data packet according to the network packet protocol comprising: updating a first register with a first partial packet length specific to the first network protocol; updating a second register with a second partial packet length specific to the second network protocol; and updating a third register with a first checksum computed from fields independent of the network protocol. The system produces a second checksum utilizing a function that combines values from the first register, the second register, and the third register. The system validates the data packet by comparing the data packet checksum to the second checksum.

Abstract: The CRC for the CPS Header of an ATM AAL2 cell is generated by a CRC generator which uses the 8 bits of the CID field to generate partial 5 bits CRCs which are loaded in a first table. The 6 bits LI field and 5 bits UUI field are added to the partial 5 bits CRC to form 16 bits. The CRC generator uses the 2.sup.16 bits to generate a second CRC table. The CRC for a particular CPS header is generated by correlating bits in the CID field, LI field and UUI field with the two tables.