Abstract: A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.

Abstract: A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.

Abstract: A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.

Abstract: An audio amplifier has a first H bridge and a second H bridge, to drive a speaker as a load. The second H bridge drives the speaker through resistors for increased output impedance. Control logic operates the first H bridge as a class D amplifier for larger amplitudes of audio signal, and operates the second H bridge as a class D amplifier for smaller amplitudes of audio signal. Other aspects are also described and claimed.

Abstract: An audio amplifier has a first H bridge and a second H bridge, to drive a speaker as a load. The second H bridge drives the speaker through resistors for increased output impedance. Control logic operates the first H bridge as a class D amplifier for larger amplitudes of audio signal, and operates the second H bridge as a class D amplifier for smaller amplitudes of audio signal. Other aspects are also described and claimed.

Abstract: A group of transistors is configured to drive a bus at time slots, to express data on the bus. The group of transistors dissipates an amount of electrical energy when driving the bus to a logic level opposite to a logic level present on the bus in an immediate preceding time slot. The group of transistors is arranged to dump another amount of electrical energy. Dumping of the other amount of electrical energy is responsive to driving the bus to a logic level that is the same as present on the bus in an immediate preceding time slot. The dumped amount of electrical energy is equivalent to the amount of energy dissipated by the transistors when transitioning the bus to a different logic level. Other aspects are also described.

Abstract: A power converter provides a first output voltage and a second output voltage in accordance with a control input, wherein the first output voltage is higher than the second output voltage. A switch that is series coupled between i) an energy reservoir node and ii) a power supply node or a power return node. A charge maintenance circuit is coupled to the energy reservoir node, and when the switch is closed can maintain a selected amount of charge in or a selected voltage across an energy reservoir element that may be coupled to the energy reservoir node. Other aspects are also described and claimed.

Abstract: An excitation signal is produced on a plate of an unknown capacitor and on a plate of a known capacitor. The excitation signal is amplified over time to produce a first output signal, with gain that is proportional to capacitance of the unknown capacitor. The excitation signal is also amplified over time to produce a second output signal, with gain that is proportional to capacitance of the known capacitor. Capacitance of the unknown capacitor is computed using a mathematical function of the first and second output signals and the capacitance of the known capacitor, while being insensitive to amplitude of the excitation signal. Other embodiments are also described and claimed.

Abstract: An analog to digital conversion circuit receives a transducer output signal and outputs a data bitstream, where a latch or flip flop has an input that receives a clock signal. An AC-DC power converter receives the clock signal and produces a DC voltage which may power the analog to digital conversion circuit. The AC-DC power converter has a rectifier, an energy store and a voltage regulator, charge pump or filter, which draws power from the energy store to produce the DC voltage. A control circuit delays replenishment of the energy store by the rectified clock signal, responsive to the clock signal. Other embodiments are also described and claimed.

Abstract: An audio system bus has a bus data line and a bus clock line. Audio producers are coupled to the bus to form a time-division multiplexed multi drop bus interface arrangement having protocol slots 0, 1, . . . N where N is an integer greater than two. A bus device is coupled to the bus that produces a) a frame marker on the bus data line in slot 0, and b) a data bit on the bus data line in slot 1. The audio producers are to produce their respective audio data bits in their assigned slots other than slots 0 and 1. Other embodiments are also described and claimed.

Abstract: An analog to digital conversion circuit receives a transducer output signal and outputs a data bitstream, where a latch or flip flop has an input that receives a clock signal. An AC-DC power converter receives the clock signal and produces a DC voltage which may power the analog to digital conversion circuit. The AC-DC power converter has a rectifier, an energy store and a voltage regulator, charge pump or filter, which draws power from the energy store to produce the DC voltage. A control circuit delays replenishment of the energy store by the rectified clock signal, responsive to the clock signal. Other embodiments are also described and claimed.

Abstract: A micro speaker assembly including a micro speaker having a top plate, a bottom plate parallel to the top plate, a magnet assembly coupled to one of the top plate or the bottom plate, a compliant member positioned between the magnet assembly and the top plate or the bottom plate, the compliant member operable to be displaced in response to an acoustic input, and a voice coil coupled to the compliant member. The assembly further including an optical sensor coupled to the micro speaker, the optical sensor having a light emitter and a light detector, the light emitter and the light detector being fixedly coupled to the top plate or the bottom plate, and the optical sensor being operable to produce a displacement signal corresponding to a displacement of the compliant member and a temperature signal corresponding to a temperature of the magnet assembly.

Abstract: An excitation signal is produced on a plate of an unknown capacitor and on a plate of a known capacitor. The excitation signal is amplified over time to produce a first output signal, with gain that is proportional to capacitance of the unknown capacitor. The excitation signal is also amplified over time to produce a second output signal, with gain that is proportional to capacitance of the known capacitor. Capacitance of the unknown capacitor is computed using a mathematical function of the first and second output signals and the capacitance of the known capacitor, while being insensitive to amplitude of the excitation signal. Other embodiments are also described and claimed.

Abstract: A charge pump circuit having first and second input nodes to be coupled to a first power source, and top and bottom output nodes and an intermediate node. The charge pump circuit produces i) a voltage at the top output node that is higher than a voltage of the intermediate node, and ii) a voltage at the bottom output node that is lower than the voltage of the intermediate node. A bias voltage source has i) an input that is to be coupled to a second power source and ii) an output that produces an output voltage, which is a predetermined proportion of an input voltage at the input and that follows the input voltage downward and upward as the input voltage sags and recovers, respectively. The output of the bias voltage source is directly connected to the intermediate node of the output stage. Other embodiments are also described.

Abstract: A charge pump circuit having first and second input nodes to be coupled to a first power source, and top and bottom output nodes and an intermediate node. The charge pump circuit produces i) a voltage at the top output node that is higher than a voltage of the intermediate node, and ii) a voltage at the bottom output node that is lower than the voltage of the intermediate node. A bias voltage source has i) an input that is to be coupled to a second power source and ii) an output that produces an output voltage, which is a predetermined proportion of an input voltage at the input and that follows the input voltage downward and upward as the input voltage sags and recovers, respectively. The output of the bias voltage source is directly connected to the intermediate node of the output stage. Other embodiments are also described.

Abstract: A method for audio signal processing, where an audio amplifier drives a load through a connector, using 1) an input audio signal, and 2) a signal from a return pin of the connector. Output headroom of the audio amplifier is automatically detected, while the amplifier is driving the load. A variable resistor circuit that is coupled to provide variable resistance between the return pin of the connector and a ground plane, is automatically adjusted, in response to the detected output headroom of the amplifier. Other embodiments are also described and claimed.

Abstract: A multi-channel audio system that can provide a variable sub-sample delay between two or more audio channels. In one embodiment, a variable timing clock generator generates multiple clock signals where each may have different phase, and the clock generator can vary the phase difference, in accordance with a sub-sample delay setting input. These clock signals are used by respective digital-to-analog converters (DACs) to convert the digital audio channels into analog form. In another embodiment, a variable delay block is added to an oversampling DAC, on a per channel basis. Other embodiments are also described and claimed.

Abstract: A computer system having a loudspeaker mounted on a main logic board by a hermetic seal, is disclosed. More particularly, embodiments of the computer system include an acoustic cavity defined between the loudspeaker, the main logic board, and the hermetic seal. Embodiments of the computer system may include a compressible seal separated from the hermetic seal by the loudspeaker and/or the main logic board. The compressible seal may define an acoustic channel and the loudspeaker may emit sound in a high frequency range through the acoustic channel toward a system exit. Other embodiments are also described and claimed.

Abstract: A computer system having a loudspeaker mounted on a main logic board by a hermetic seal, is disclosed. More particularly, embodiments of the computer system include an acoustic cavity defined between the loudspeaker, the main logic board, and the hermetic seal. Embodiments of the computer system may include a compressible seal separated from the hermetic seal by the loudspeaker and/or the main logic board. The compressible seal may define an acoustic channel and the loudspeaker may emit sound in a high frequency range through the acoustic channel toward a system exit. Other embodiments are also described and claimed.

Abstract: A programmed data processor obtains a number of input voltage measurements for a number of speaker drivers, respectively, and a sensed shared current being a measure of current in a single power supply rail that is feeding power to each of a number of audio amplifiers while the audio amplifiers are driving the speaker drivers in accordance with a number of audio channel test signals, respectively. The programmed data processor computes an estimate of electrical input impedance of each of the speaker drivers using the input voltage measurement for the speaker driver and using the sensed shared current. Other embodiments are also described and claimed.