Patents by Inventor Nathan BUCHANAN

Nathan BUCHANAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SYSTEMS AND METHODS FOR ACCESS PROTECTION OF SYSTEM PERIPHERALS
    Publication number: 20240152658
    Abstract: A system may include a plurality of processing cores, a target shared among the plurality of processing cores and coupled to the plurality of processing cores via a shared bus, and access control logic configured to, based on access configuration settings associated with the target, control access of requests from each of the plurality of processing cores based on a privilege level of each of the plurality of processing cores, in order to dynamically allocate and re-allocate the target among the plurality of processing cores in accordance with the privilege levels and to dynamically utilize the target in accordance with the privilege levels.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 9, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Younes DJADI, Xingdong DAI, Nathan BUCHANAN, Nariankadu D. HEMKUMAR
  • Discrete exchange and update of multiple consistent subset views of an evolving data store
    Patent number: 10963187
    Abstract: A system for reading a plurality of subset views of an evolving data store may include for each subset view, a plurality of memory buffers comprising at least three buffers.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: March 30, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Nathan Buchanan, Roshan Kamath, Nariankadu D. Hemkumar, Younes Djadi, Sachin Deo, Eric B. Smith
  • DISCRETE EXCHANGE AND UPDATE OF MULTIPLE CONSISTENT SUBSET VIEWS OF AN EVOLVING DATA STORE
    Publication number: 20200393990
    Abstract: A system for reading a plurality of subset views of an evolving data store may include for each subset view, a plurality of memory buffers comprising at least three buffers.
    Type: Application
    Filed: June 11, 2019
    Publication date: December 17, 2020
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Nathan BUCHANAN, Roshan KAMATH, Nariankadu D. HEMKUMAR, Younes DJADI, Sachin DEO, Eric B. SMITH