Patents by Inventor Nathan D. Dautenhahn

Nathan D. Dautenhahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Mechanism for facilitating dynamic and efficient management of instruction atomicity volations in software programs at computing systems
    Patent number: 10394561
    Abstract: A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: August 27, 2019
    Assignee: INTEL CORPORATION
    Inventors: Nathan D. Dautenhahn, Justin Gottschlich, Gilles Pokam, Cristiano Pereira, Shiliang Hu, Klaus Danne, Rolf Kassa
  • MECHANISM FOR FACILITATING DYNAMIC AND EFFICIENT MANAGEMENT OF INSTRUCTION ATOMICITY VOLATIONS IN SOFTWARE PROGRAMS AT COMPUTING SYSTEMS
    Publication number: 20170039070
    Abstract: A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.
    Type: Application
    Filed: October 19, 2016
    Publication date: February 9, 2017
    Inventors: NATHAN D. DAUTENHAHN, JUSTIN GOTTSCHLICH, GILLES POKAM, CRISTIANO PEREIRA, SHILIANG HU, KLAUS DANNE, ROLF KASSA
  • Mechanism for facilitating dynamic and efficient management of instruction atomicity violations in software programs at computing systems
    Patent number: 9501340
    Abstract: A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 22, 2016
    Assignee: Intel Corporation
    Inventors: Nathan D. Dautenhahn, Justin E. Gottschlich, Gilles Pokam, Cristiano L. Pereira, Shiliang Hu, Klaus Danne, Rolf Kassa
  • MECHANISM FOR FACILITATING DYNAMIC AND EFFICIENT MANAGEMENT OF INSTRUCTION ATOMICITY VOLATIONS IN SOFTWARE PROGRAMS AT COMPUTING SYSTEMS
    Publication number: 20140281705
    Abstract: A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Nathan D. Dautenhahn, Justin E. Gottschlich, Gilles Pokam, Cristiano L. Pereira, Shiliang Hu, Klaus Danne