Patents by Inventor Nathan D. Hindman

Nathan D. Hindman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9038012
    Abstract: The disclosure relates generally to triple-redundant sequential state (TRSS) machines formed as integrated circuits on a semiconductor substrate, such as CMOS, and computerized methods and systems of designing the triple-redundant sequential state machines. Of particular focus in this disclosure are sequential state elements (SSEs) used to sample and hold bit states. The sampling and holding of bits states are synchronized by a clock signal thereby allowing for pipelining in the TRSS machines. In particular, the clock signal may oscillate between a first clock state and a second clock state to synchronize the operation of the SSE according to the timing provided by the clock states. The SSEs has a self-correcting mechanism to protect against radiation induced soft errors. The SSE may be provided in a pipeline circuit of a TRSS machine to receive and store a bit state of bit signal generated by combinational circuits within the pipeline circuit.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: May 19, 2015
    Assignee: Arizona Board of Regents on behalf of Arizona State University
    Inventors: Lawrence T. Clark, Nathan D. Hindman, Dan Wheeler Patterson
  • Publication number: 20140331197
    Abstract: The disclosure relates generally to triple-redundant sequential state (TRSS) machines formed as integrated circuits on a semiconductor substrate, such as CMOS, and computerized methods and systems of designing the triple-redundant sequential state machines. Of particular focus in this disclosure are sequential state elements (SSEs) used to sample and hold bit states. The sampling and holding of bits states are synchronized by a clock signal thereby allowing for pipelining in the TRSS machines. In particular, the clock signal may oscillate between a first clock state and a second clock state to synchronize the operation of the SSE according to the timing provided by the clock states. The SSEs has a self-correcting mechanism to protect against radiation induced soft errors. The SSE may be provided in a pipeline circuit of a TRSS machine to receive and store a bit state of bit signal generated by combinational circuits within the pipeline circuit.
    Type: Application
    Filed: June 13, 2014
    Publication date: November 6, 2014
    Applicant: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
    Inventors: Lawrence T. Clark, Nathan D. Hindman, Dan Wheeler Patterson
  • Patent number: 8791718
    Abstract: The disclosure relates generally to triple-redundant sequential state (TRSS) machines formed as integrated circuits on a semiconductor substrate, such as CMOS, and computerized methods and systems of designing the triple-redundant sequential state machines. Of particular focus in this disclosure are sequential state elements (SSEs) used to sample and hold bit states. The sampling and holding of bits states are synchronized by a clock signal thereby allowing for pipelining in the TRSS machines. In particular, the clock signal may oscillate between a first clock state and a second clock state to synchronize the operation of the SSE according to the timing provided by the clock states. The SSEs have a self-correcting mechanism to protect against radiation induced soft errors. The SSE may be provided in a pipeline circuit of a TRSS machine to receive and store a bit state of bit signal generated by combinational circuits within the pipeline circuit.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: July 29, 2014
    Assignee: Arizona Board of Regents for and on behalf of Arizona State University
    Inventors: Lawrence T. Clark, Nathan D. Hindman, Dan Wheeler Patterson
  • Publication number: 20120306535
    Abstract: The disclosure relates generally to triple-redundant sequential state (TRSS) machines formed as integrated circuits on a semiconductor substrate, such as CMOS, and computerized methods and systems of designing the triple-redundant sequential state machines. Of particular focus in this disclosure are sequential state elements (SSEs) used to sample and hold bit states. The sampling and holding of bits states are synchronized by a clock signal thereby allowing for pipelining in the TRSS machines. In particular, the clock signal may oscillate between a first clock state and a second clock state to synchronize the operation of the SSE according to the timing provided by the clock states. The SSEs has a self-correcting mechanism to protect against radiation induced soft errors. The SSE may be provided in a pipeline circuit of a TRSS machine to receive and store a bit state of bit signal generated by combinational circuits within the pipeline circuit.
    Type: Application
    Filed: June 4, 2012
    Publication date: December 6, 2012
    Applicant: Arizona Board of Regents for and on behalf of Arizona State University
    Inventors: Lawrence T. Clark, Nathan D. Hindman, Dan Wheeler Patterson
  • Patent number: 6468330
    Abstract: The particle separation and collection assembly uses cyclonic forces to separate and remove large particles from an airstream and concentrate small particles for sensor/detector technology. This assembly utilizes multiple mini cyclones operating in parallel to reduce the size and velocity of air through the cyclone inlets while maintaining the same fluid or flow rate as compared to one large cyclone. The multiple cyclone system can be arranged in a radial geometry or in a bipolar or uni-polar longitudinal design. The particle separator and collection assembly uses a blower or vacuum pump to draw outside gas into the cyclone particle separator assembly through radial inlets. Vacuum transfer channels, extending the entire length of the assembly, pull gas into the top of the cyclone chambers and out through the bottom apex of cyclone chamber and through the top vortex finder.
    Type: Grant
    Filed: June 14, 2000
    Date of Patent: October 22, 2002
    Assignee: Innovatek, Inc.
    Inventors: Patricia M. Irving, W. Lloyd Allen, Nathan D. Hindman, Trevor M. Moeller