Patents by Inventor Nathan Daniel Tuck

Nathan Daniel Tuck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8356144
    Abstract: A vector processing system provides high performance vector processing using a System-On-a-Chip (SOC) implementation technique. One or more scalar processors (or cores) operate in conjunction with a vector processor, and the processors collectively share access to a plurality of memory interfaces coupled to Dynamic Random Access read/write Memories (DRAMs). In typical embodiments the vector processor operates as a slave to the scalar processors, executing computationally intensive Single Instruction Multiple Data (SIMD) codes in response to commands received from the scalar processors. The vector processor implements a vector processing Instruction Set Architecture (ISA) including machine state, instruction set, exception model, and memory model.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: January 15, 2013
    Inventors: Richard Hessel, Chetana N. Keltcher, Nathan Daniel Tuck, Korbin S. Van Dyke
  • Publication number: 20090300323
    Abstract: A vector processing system provides high performance vector processing using a System-On-a-Chip (SOC) implementation technique. One or more scalar processors (or cores) operate in conjunction with a vector processor, and the processors collectively share access to a plurality of memory interfaces coupled to Dynamic Random Access read/write Memories (DRAMs). In typical embodiments the vector processor operates as a slave to the scalar processors, executing computationally intensive Single Instruction Multiple Data (SIMD) codes in response to commands received from the scalar processors. The vector processor implements a vector processing Instruction Set Architecture (ISA) including machine state, instruction set, exception model, and memory model.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 3, 2009
    Inventors: Richard Hessel, Chetana N. Keltcher, Nathan Daniel Tuck, Korbin S. Van Dyke
  • Patent number: 7543119
    Abstract: A vector processing system provides high performance vector processing using a System-On-a-Chip (SOC) implementation technique. One or more scalar processors (or cores) operate in conjunction with a vector processor, and the processors collectively share access to a plurality of memory interfaces coupled to Dynamic Random Access read/write Memories (DRAMs). In typical embodiments the vector processor operates as a slave to the scalar processors, executing computationally intensive Single Instruction Multiple Data (SIMD) codes in response to commands received from the scalar processors. The vector processor implements a vector processing Instruction Set Architecture (ISA) including machine state, instruction set, exception model, and memory model.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: June 2, 2009
    Inventors: Richard Edward Hessel, Nathan Daniel Tuck, Korbin S. Van Dyke, Chetana N. Keltcher