Abstract: Method and apparatus for selectively inverting memory bits (41-49) in a memory (14). In one embodiment a master reversion bit (75) is used to indicate if all memory bits (41-49) have been inverted. In an alternate embodiment, row reversion bits (77) are used to indicate whether the bits in a corresponding row have been inverted. In yet another embodiment, the reversion column reversion bit (202) may be used to indicate whether the row revert bits (77) themselves have been inverted. These control bits (75, 77, 202) determine whether the output from each column of memory (14) is inverted (i.e. reverted to its original logic state) in order to provide the correct logical state at the data output of memory (14).

Abstract: Apparatus for decoding information which has been coded with a tree code including a tree decoder. The tree decoder includes a tree input port at which a token enters the tree decoder, a plurality of tree output ports from one of which the token exits the tree decoder and a plurality of nodes forming a tree connected between the tree input port and the tree output ports. Each of the nodes includes an token input port, two token output ports, a code input port and apparatus for operating the node in a first mode wherein the token passes from the token input port to one of the token output ports in response to the code input and in a second mode wherein the token passes from the token input port to one of the output token ports independent of the code output.