Patents by Inventor Nathan Laredo

Nathan Laredo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7734892
    Abstract: A method for providing hardware support for memory protection and virtual memory address translation for a virtual machine. The method includes executing a host machine application on a host computer system, executing a first virtual machine application within a first virtual machine, and executing a second virtual machine application within a second virtual machine. A plurality of TLB (translation look aside buffer) entries for the first virtual machine application and the second machine application are stored within a TLB of the host computer system. At least one of the plurality of TLB entries is a global TLB entry.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: June 8, 2010
    Inventors: Guillermo J. Rozas, Nathan Laredo
  • Patent number: 7694301
    Abstract: A method for supporting input/output for a virtual machine. The method includes the step of executing virtual machine application instructions, wherein the application instructions are executed using micro architecture code of a processor architecture. An I/O access is received from the virtual machine application. Virtual memory protection is used to generate an exception, wherein the exception is caused by the I/O access. A single step mode is entered to perform the I/O access using a host operating system. State data for the virtual machine application is updated in accordance with the I/O access. Subsequently, execution of the virtual machine application is resumed.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: April 6, 2010
    Inventors: Nathan Laredo, Linus Torvalds