Patents by Inventor Nathan Mackenzie Sidwell

Nathan Mackenzie Sidwell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6903750
    Abstract: A method for generating a series of digitized control values for an output device to represent a continuous series of source data, comprising the steps of: storing in a single register a first digitized control value and an indication of deviation between that value and the source data; and repeatedly adding an increment to the register to generate a further digitized control value and simultaneously update the indication of deviation.
    Type: Grant
    Filed: April 5, 2002
    Date of Patent: June 7, 2005
    Assignee: STMicroelectronics Limited
    Inventor: Nathan Mackenzie Sidwell
  • Patent number: 6564314
    Abstract: A computer system has compact instructions avoiding the need for redundant bit locations and needing simple decoding. Logic circuitry is arranged to respond to an instruction set comprising a plurality of selectable instructions of different bit lengths. Each instruction is based on a format of predetermined bit length and a predetermined sequence of instruction fields each of a respective predetermined bit length. Some instructions omit a selected one of the fields and include an identifier of less bit length than the omitted field to indicate which field is omitted. Thus this bit length of the instruction is compressed. The logic circuitry is operable to restore the omitted field on execution of the instruction.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 13, 2003
    Assignee: SGS-Thomson Microelectronics Limited
    Inventors: Michael David May, Andrew Craig Sturges, Nathan Mackenzie Sidwell
  • Publication number: 20030071817
    Abstract: A method for generating a series of digitised control values for an output device to represent a continuous series of source data, comprising the steps of: storing in a single register a first digitised control value and an indication of deviation between that value and the source data; and repeatedly adding an increment to the register to generate a further digitised control value and simultaneously update the indication of deviation.
    Type: Application
    Filed: April 5, 2002
    Publication date: April 17, 2003
    Inventor: Nathan Mackenzie Sidwell
  • Patent number: 6145077
    Abstract: A computer and a method of operating a computer is disclosed which allow manipulation of data values in the context of the execution of so-called "packed instructions". Packed instructions are carried out on packed operands. A packed operand comprises a data string consisting of a plurality of sub-strings, each defining a particular data value or object. The invention relates to a restructuring instruction which allows objects to be reorganized within a data string thereby minimizing loading and storing operations to memory.
    Type: Grant
    Filed: May 14, 1996
    Date of Patent: November 7, 2000
    Assignee: SGS-Thomson Microelectronics Limited
    Inventors: Nathan Mackenzie Sidwell, Catherine Louise Barnaby
  • Patent number: 6100905
    Abstract: A computer instruction is described which expands compressed font information to provide an expanded format suitable for driving a display for example. The expansion is carried out by identifying a bit string having at least one bit sequence, selecting each bit of the bit sequence and replicating each selected bit at a plurality of adjacent locations. This is carried out in a register store having a predetermined bit capacity addressable by a single address. The instruction is particularly useful for generating background or foreground font information for driving a display.
    Type: Grant
    Filed: June 6, 1996
    Date of Patent: August 8, 2000
    Assignee: SGS-Thomson Microelectronics Limited
    Inventor: Nathan Mackenzie Sidwell
  • Patent number: 6009508
    Abstract: A computer system has instructions which have a reduction in the number of address bits relative to the number of data items that may be held during instruction execution. The instruction set comprises selectable instructions, a plurality of the instructions each including one set of bit locations identifying an operation to be carried out by execution of the instruction and a second set of bit locations to identify an address of a data storage location for use in execution of the instruction. The computer system further includes a plurality of addressable data storage locations for holding simultaneously a plurality of data values during execution of a sequence of instructions, with at least one of the data storage locations comprising a multi-value store requiring a single address in an instruction and arranged to hold a plurality of data values simultaneously on a first-in, first-out basis.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: December 28, 1999
    Assignee: SGS-Thomson Microelectronics Limited
    Inventors: Michael David May, Andrew Craig Sturges, Nathan Mackenzie Sidwell
  • Patent number: 5875355
    Abstract: A method of effecting a matrix transpose operation in a computer is described. The method uses a computer instruction which restructures a data string by retaining first and last sub-strings of the data string in unchanged positions and interchanges the position of at least two intermediate sub-strings. The data string is formed from sub-strings each representing one or more data value in a matrix.The computer instruction can be effected in a single register store having a predetermined bit capacity addressable by a single address, or in a pair of such register stores.The data restructuring instructions include "flip", "zip" and "unzip" instructions.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: February 23, 1999
    Assignee: SGS-Thomson Microelectronics Limited
    Inventors: Nathan Mackenzie Sidwell, Catherine Louise Barnaby
  • Patent number: 5859790
    Abstract: A computer instruction is provided which replicates a bit sequence to generate a data string consisting only of a plurality of the replicated bit sequences. The computer instruction allows this to be done in a register store having a predetermined bit capacity addressable by a single address. The computer instruction is useful in the context of packed arithmetic instructions, where it is often desirable to combine each of a set of objects arithmetically or logically with a common object. A computer and a method of operating a computer using the instruction are described.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: January 12, 1999
    Assignee: SGS-Thomson Microelectronics Limited
    Inventor: Nathan Mackenzie Sidwell
  • Patent number: 5822619
    Abstract: A computer and a method of operating a computer is disclosed which allow manipulation of data values in the context of the execution of so-called "packed instructions". Packed instructions are carried out on packed operands. A packed operand comprises a data string consisting of a plurality of sub-strings, each defining a particular data value or object. The invention relates to a restructuring instruction which allows objects to be reorganised within a data string thereby minimising loading and storing operations to memory.
    Type: Grant
    Filed: May 14, 1996
    Date of Patent: October 13, 1998
    Assignee: SGS-Thomson Microelectronics Ltd.
    Inventor: Nathan Mackenzie Sidwell