Abstract: A system includes a filter and a tuner formed on an integrated circuit. The filter receives an input signal comprising a first number of channels and communicates an intermediate output signal comprising a second number of channels less than the first number of channels. The tuner is coupled to the filter and receives the intermediate output signal and communicates an output signal comprising a third number of channels less than the second number of channels.

Abstract: A system includes a filter and a tuner formed on an integrated circuit. The filter receives an input signal comprising a first number of channels and communicates an intermediate output signal comprising a second number of channels less than the first number of channels. The tuner is coupled to the filter and receives the intermediate output signal and communicates an output signal comprising a third number of channels less than the second number of channels.

Abstract: A system includes a filter and a tuner formed on an integrated circuit. The filter receives an input signal comprising a first number of channels and communicates an intermediate output signal comprising a second number of channels less than the first number of channels. The tuner is coupled to the filter and receives the intermediate output signal and communicates an output signal comprising a third number of channels less than the second number of channels.

Abstract: A wireless receiver is provided that includes a component and a power control logic 80. The component is operable to receive a wireless signal and process the wireless signal in at least one of a first mode and a second mode. The first mode uses less power than the second mode. The power control logic 80 is operable based on a characteristic of the wireless signal to promote processing the wireless signal by the component in the at least one of the first and second modes. A method for a wireless receiver to process the wireless signal to reduce power consumption is also provided. The method includes determining a characteristic of the wireless signal, and selecting one of a first and second modes in which to process the signal based on the characteristic of the wireless signal.

Abstract: Baseband receiver circuitry is dynamically biased in a communication system receiver by generating gain control information, and controlling an adjustable bias of at least a portion of the baseband circuitry based at least in part on the gain control information. The baseband receiver circuitry comprises at least one amplifier having an adjustable bias associated therewith, with the adjustable bias of the amplifier being controllable utilizing a bias control signal. For example, the amplifier may be an operational amplifier having a gain stage and an output buffer stage, with the bias control signal being applied to the output buffer stage to control an adjustable bias current thereof. More specifically, the bias control signal may be used to control an amount of current provided by at least one of a plurality of current sources associated with the output buffer stage of the amplifier, for example, by controlling a switch which enables or disables one or more of the current sources.

Abstract: A radio frequency (RF) module for use in a communication device of a communication system includes integrated RF circuitry comprising at least one of a transmitter and a receiver, and an antenna element having at least one portion thereof arranged substantially adjacent to and operatively coupled to the integrated RF circuitry. For example, the antenna element may include at least first and second portions having opposing edges arranged immediately adjacent respective first and second sides of the integrated RF circuitry. A plurality of the modules can be used to implement a transceiver in a communication system base station or other communication device.

Abstract: A radio frequency (RF) module for use in a communication device of a communication system includes integrated RF circuitry comprising at least one of a transmitter and a receiver, and an antenna element having at least one portion thereof arranged substantially adjacent to and operatively coupled to the integrated RF circuitry. For example, the antenna element may include at least first and second portions having opposing edges arranged immediately adjacent respective first and second sides of the integrated RF circuitry. A plurality of the modules can be used to implement a transceiver in a communication system base station or other communication device.

Abstract: Metalization structures are modeled by employing a basis function decomposition process for modeling the charge and/or current distributions and the interactions of those distributions on metalization structures arising from voltages and currents flowing in the metalization structures. Then, the charge and/or current distributions and their interactions are employed to obtain the electrical characteristics of a metalization structure. In one embodiment of the invention, representative sub units of the metalization structure are selected, the charge and current distributions are determined in those representative sub units, the self and mutual interactions are determined of those sub units and, then, those self and mutual interactions are used as an initial solution to describe all interactions between similar metalization sub units in the overall system of metals. These interactions are then employed to determine the impedance and admittance of each of the sub units.

Abstract: Metalization structures are modeled by employing automatic substrate grounding and shielding generation in conjunction with a design and simulation process for modeling the charge distributions and the interactions of these charge distributions on metalization structures arising from voltages and currents flowing in metalization structures. By generating and, then, employing a grounding structure that is optimized to strongly screen the metalization structure being designed and simulated, the requirement is eliminated for the accurate incorporation of the strongly dependent long range metalization sub unit to sub unit charge distribution coupling from the charge distribution determination process. In one embodiment of the invention, representative metalization sub units are selected, such as straight sections of infinitesimal length, right angle bends and intersections.

Abstract: A so-called multipole decomposition is employed for modeling the charge and current distributions and the interactions of those distributions in metalization sub units arising from electrical signals in those metalization sub units. Specifically, a variable interaction range meshing, i.e., multipole, decomposition process is advantageously employed to model the charge and current distributions of metalization sub units. These distributions are then employed to obtain electrical characteristics of an overall physical metalization structure to be fabricated. In an embodiment of this invention, representative sections of metalization sub units are selected such as straight sections of infinitesimal length, right angle bends and intersections, and solved for the local short range charge and current interactions that determine their local distributions in those sub units.

Abstract: Electrodynamically determined electric field and/or current distributions are employed in conjunction with statically determined electric field distributions localized to metalization structures on a conductive substrate to model metal structures to be fabricated on a substrate. Specifically, the static electric field distributions are subtracted from the electrodynamic field distributions and the results are used to determine the electrodynamic component of self and mutual interactions between metalization structures to be fabricated on the conductive substrate. Then, statically determined current interactions of the metalization structures to be fabricated are determined and superimposed on the electrodynamic interactions. The results of the superimposition are used to generate the overall integrated circuit metal structure to be fabricated on the conductive substrate.

Abstract: This patent teaches multiplexing MR head circuits to an off-chip capacitor in novel ways to eliminate excessive numbers of off-chip components. The bias current is switched off for each MR head when it is not in use and the bias current is supplied only to the MR head being employed at a given time. On the sensing side, the invention teaches connecting a single capacitor across a plurality of pairs of transistor emitters, each pair of transistors having their collectors (assuming NPN) connected to the sense lines of one of the MR heads. A number of example circuits are illustrated and described, including one employing PNP transistors.