Abstract: The present disclosure provides systems and methods to provide a constant common mode voltage at the input terminals of a difference amplifier. A difference amplifier can receive an input signal and can deliver an amplified version of the received input signal at an output of the difference amplifier. In a system where a difference amplifier can receive an output of a digital-to-analog converter (DAC), the DAC performance can deteriorate in situations where common mode voltage at the input terminals of the difference amplifier are changing. A difference amplifier including feedback circuitry can provide a constant common mode voltage at the input terminals of the difference amplifier, leading to improved performance in a system where the difference amplifier receives an input signal from a DAC.

Abstract: The present disclosure provides systems and methods to provide a constant common mode voltage at the input terminals of a difference amplifier. A difference amplifier can receive an input signal and can deliver an amplified version of the received input signal at an output of the difference amplifier. In a system where a difference amplifier can receive an output of a digital-to-analog converter (DAC), the DAC performance can deteriorate in situations where common mode voltage at the input terminals of the difference amplifier are changing. A difference amplifier including feedback circuitry can provide a constant common mode voltage at the input terminals of the difference amplifier, leading to improved performance in a system where the difference amplifier receives an input signal from a DAC.

Abstract: In an embodiment, a body of apparatus includes an opening, such as a V-shaped jaw, that deterministically locates a position of a wire in at least one dimension when the wire is placed in the opening. The apparatus also includes a plurality of sensors. At least one differential signal can be generated from signals from magnetic sensors, such as anisotropic magnetoresistance (AMR) sensors, of the plurality of sensors to cancel out common mode interference. An additional sensor of the plurality of sensors provides an output from which the location of the wire in another dimension is determined. The current flowing through the wire can be derived from at least the at least one differential signal and the location of the wire the other dimension.

Abstract: One aspect of this disclosure is a transimpedance amplifier circuit with multiple resistive feedback loops can be implemented with multiple Kelvin sensing channels. A transimpedance amplifier and multiple Kelvin sensing channels can be implemented on a single die having multiple contacts, such as pins, for connecting multiple resistors to the Kelvin sensing channels. The Kelvin sensing channels can be implemented with T-junction switch networks in certain embodiments.

Abstract: Practical electronics such as amplifiers or voltage references can have circuit imbalances due to manufacturing imperfections. For example, amplifiers can have an undesirable offset voltage. The offset voltage might also drift with temperature making the design of these devices difficult. Disclosed are techniques which decrease the amount of offset voltage which provide predictability of device parameters over a range of temperatures.

Abstract: One aspect of this disclosure is a transimpedance amplifier circuit with multiple resistive feedback loops can be implemented with multiple Kelvin sensing channels. A transimpedance amplifier and multiple Kelvin sensing channels can be implemented on a single die having multiple contacts, such as pins, for connecting multiple resistors to the Kelvin sensing channels. The Kelvin sensing channels can be implemented with T-junction switch networks in certain embodiments.

Abstract: Practical electronics such as amplifiers or voltage references can have circuit imbalances due to manufacturing imperfections. For example, amplifiers can have an undesirable offset voltage. The offset voltage might also drift with temperature making the design of these devices difficult. Disclosed are techniques which decrease the amount of offset voltage which provide predictability of device parameters over a range of temperatures.

Abstract: In an embodiment, a body of apparatus includes an opening, such as a V-shaped jaw, that deterministically locates a position of a wire in at least one dimension when the wire is placed in the opening. The apparatus also includes a plurality of sensors. At least one differential signal can be generated from signals from magnetic sensors, such as anisotropic magnetoresistance (AMR) sensors, of the plurality of sensors to cancel out common mode interference. An additional sensor of the plurality of sensors provides an output from which the location of the wire in another dimension is determined. The current flowing through the wire can be derived from at least the at least one differential signal and the location of the wire the other dimension.

Abstract: In one embodiment, an apparatus includes a package that encompasses at least a first integrated circuit die and a second integrated circuit die. The first integrated circuit die is attached to the package and includes one or more electrical overstress/electrostatic discharge (EOS/ESD) protection circuits. The second integrated circuit die is attached to the package and electrically coupled to the first integrated circuit die such that at least one component of the second integrated circuit die is protected from EOS/ESD by the first integrated circuit die.

Abstract: In one embodiment, an apparatus includes a package that encompasses at least a first integrated circuit die and a second integrated circuit die. The first integrated circuit die is attached to the package and includes one or more electrical overstress/electrostatic discharge (EOS/ESD) protection circuits. The second integrated circuit die is attached to the package and electrically coupled to the first integrated circuit die such that at least one component of the second integrated circuit die is protected from EOS/ESD by the first integrated circuit die.

Abstract: A low voltage shutdown circuit comprises an input node for receiving a voltage Vin to be monitored, first and second voltage-to-current (V to I) converters arranged to receive Vin at respective inputs and to convert Vin to currents I1 and I2 at respective outputs, and a current comparison circuit arranged to produce an output which is in a first state when I1<I2 and in a second state when I1>I2. The V to I converters have respective voltage-to-current transfer functions which intersect at a non-zero threshold voltage Vth, such that the current comparison circuit output toggles when Vin<Vth. This output can be used as needed to, for example, trigger the shut down of other circuitry.

Abstract: A low voltage shutdown circuit comprises an input node for receiving a voltage Vin to be monitored, first and second voltage-to-current (V to I) converters arranged to receive Vin at respective inputs and to convert Vin to currents I1 and I2 at respective outputs, and a current comparison circuit arranged to produce an output which is in a first state when I1<I2 and in a second state when I1>I2. The V to I converters have respective voltage-to-current transfer functions which intersect at a non-zero threshold voltage Vth, such that the current comparison circuit output toggles when Vin<Vth. This output can be used as needed to, for example, trigger the shut down of other circuitry.

Abstract: A common mode linearized input stage comprises NPN and PNP differential pairs biased with respective tail currents at respective common emitter nodes, with each pair connected to receive a differential input signal. A tail current modulation circuit generates complementary output currents as a function of the voltage difference between the common emitter nodes, and first and second tail current sources generate the tail currents as a function of the complementary output currents. The tail current modulation circuit and the first and second tail current sources are arranged such that the magnitudes of the tail currents increase with an increasing differential input signal.

Abstract: A phase inversion prevention circuit for an op amp input stage includes a detection circuit which detects when either of the input pairs' intrinsic diodes is near a forward-biased condition. When such a condition is detected, a switching network switches tail current from the primary input pair to a secondary input pair which takes over the input stage's amplifying duties. For a folded cascode input stage, the detection circuit preferably detects the onset of phase inversion by monitoring the cascode voltage which drives the cascode transistors. The outputs of the secondary input pair are connected to bypass the cascode transistors. Thus, when the onset of phase inversion is detected, the primary input pair is disabled, the second input pair is enabled, and with the cascode transistors bypassed the secondary input pair avoids phase inversion.