Patents by Inventor Nathan Richard Schemm
Nathan Richard Schemm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250211222Abstract: An example apparatus includes: a first transistor implemented using Gallium Nitride (GaN), the first transistor having: a drain configured to receive an input voltage from a power supply; a gate configured to receive a voltage from control circuitry; and a source; a second transistor implemented using GaN, the second transistor having: a drain coupled to the source of the first transistor; a gate coupled to a current source; and a source configured to provide an output voltage based on a voltage at the source of the first transistor; and a third transistor implemented using GaN, the third transistor having: a drain coupled to the source of the first transistor and the drain of the second transistor; a gate; and a source configured to be coupled to ground.Type: ApplicationFiled: January 30, 2024Publication date: June 26, 2025Inventors: Dong Yan, Yong Xie, Nathan Richard Schemm, Cetin Kaya, Maik Peter Kaufmann, Stefan Herzer
-
Publication number: 20250164322Abstract: Methods, apparatus, systems and articles of manufacture to trim temperature sensors are disclosed. An example method includes: sampling a first value indicative of a temperature of a first die of a multi-chip module (MCM) with a first temperature sensor, the first die including a first transistor having a channel including a first material; and calibrating a second temperature sensor configured to sample a second value indicative of a temperature of a second die including a second transistor have a second channel including a second material, the calibrating based on the first value.Type: ApplicationFiled: January 22, 2025Publication date: May 22, 2025Inventor: Nathan Richard Schemm
-
Patent number: 12235168Abstract: Methods, apparatus, systems and articles of manufacture to trim temperature sensors are disclosed. An example method includes: sampling a first value indicative of a temperature of a first die of a multi-chip module (MCM) with a first temperature sensor, the first die including a first transistor having a channel including a first material; and calibrating a second temperature sensor configured to sample a second value indicative of a temperature of a second die including a second transistor have a second channel including a second material, the calibrating based on the first value.Type: GrantFiled: June 7, 2023Date of Patent: February 25, 2025Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Nathan Richard Schemm
-
Publication number: 20240275374Abstract: A short circuit detection circuit includes a current terminal, a sense resistor, an amplifier, and a resistor-capacitor ladder. The sense resistor is coupled to the current terminal, and is configured to develop a sense voltage proportional to a current through the current terminal. The amplifier is coupled to the sense resistor, and is configured to generate a scaled current proportional to the sense voltage. The resistor-capacitor ladder is coupled to the amplifier, and is configured to generate a measurement voltage that represents a surface temperature rise due to the current through the current terminal.Type: ApplicationFiled: April 25, 2024Publication date: August 15, 2024Inventors: Cetin Kaya, Nathan Richard Schemm, Yong Xie
-
Patent number: 12003229Abstract: A short circuit detection circuit includes a current terminal, a sense resistor, an amplifier, and a resistor-capacitor ladder. The sense resistor is coupled to the current terminal, and is configured to develop a sense voltage proportional to a current through the current terminal. The amplifier is coupled to the sense resistor, and is configured to generate a scaled current proportional to the sense voltage. The resistor-capacitor ladder is coupled to the amplifier, and is configured to generate a measurement voltage that represents a surface temperature rise due to the current through the current terminal.Type: GrantFiled: June 15, 2021Date of Patent: June 4, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Cetin Kaya, Nathan Richard Schemm, Yong Xie
-
Publication number: 20230349774Abstract: Methods, apparatus, systems and articles of manufacture to trim temperature sensors are disclosed. An example method includes: sampling a first value indicative of a temperature of a first die of a multi-chip module (MCM) with a first temperature sensor, the first die including a first transistor having a channel including a first material; and calibrating a second temperature sensor configured to sample a second value indicative of a temperature of a second die including a second transistor have a second channel including a second material, the calibrating based on the first value.Type: ApplicationFiled: June 7, 2023Publication date: November 2, 2023Inventor: Nathan Richard Schemm
-
Patent number: 11698307Abstract: Methods, apparatus, systems and articles of manufacture to trim temperature sensors are disclosed. An example method includes: sampling a first value indicative of a temperature of a first die of a multi-chip module (MCM) with a first temperature sensor, the first die including a first transistor having a channel including a first material; and calibrating a second temperature sensor configured to sample a second value indicative of a temperature of a second die including a second transistor have a second channel including a second material, the calibrating based on the first value.Type: GrantFiled: December 31, 2019Date of Patent: July 11, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Nathan Richard Schemm
-
Methods, apparatus, and systems to facilitate a fault triggered diode emulation mode of a transistor
Patent number: 11621551Abstract: Methods, systems, and apparatus to facilitate a fault triggered diode emulation mode of a transistor. An example apparatus includes a driver to output a control signal to a gate terminal of a transistor of a power converter; and a diode emulation control circuit to, in response to determining a fault corresponding to the transistor, enable the transistor when current flows in a direction from a source terminal of the transistor to a drain terminal of the transistor.Type: GrantFiled: October 20, 2021Date of Patent: April 4, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Serkan Dusmez, Nathan Richard Schemm, Salil Chellappan -
Patent number: 11614478Abstract: A fault detection circuit includes a short circuit comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes an over-current comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes a voltage divider circuit which has a first terminal connected to first input of the short circuit comparison circuit, a second terminal connected to the first input of the over-current comparison circuit, and a third terminal connected to a ground terminal. The circuit includes a delay circuit which has an input connected to the output of the over-current comparison circuit and has an output.Type: GrantFiled: April 9, 2021Date of Patent: March 28, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Nathan Richard Schemm
-
Publication number: 20220399884Abstract: A short circuit detection circuit includes a current terminal, a sense resistor, an amplifier, and a resistor-capacitor ladder. The sense resistor is coupled to the current terminal, and is configured to develop a sense voltage proportional to a current through the current terminal. The amplifier is coupled to the sense resistor, and is configured to generate a scaled current proportional to the sense voltage. The resistor-capacitor ladder is coupled to the amplifier, and is configured to generate a measurement voltage that represents a surface temperature rise due to the current through the current terminal.Type: ApplicationFiled: June 15, 2021Publication date: December 15, 2022Inventors: Cetin KAYA, Nathan Richard SCHEMM, Yong XIE
-
Publication number: 20220326296Abstract: A fault detection circuit includes a short circuit comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes an over-current comparison circuit which has a first input connected to the source of the second NFET, a second input, and an output. The circuit includes a voltage divider circuit which has a first terminal connected to first input of the short circuit comparison circuit, a second terminal connected to the first input of the over-current comparison circuit, and a third terminal connected to a ground terminal. The circuit includes a delay circuit which has an input connected to the output of the over-current comparison circuit and has an output.Type: ApplicationFiled: April 9, 2021Publication date: October 13, 2022Inventor: Nathan Richard Schemm
-
Patent number: 11264983Abstract: Methods, apparatus, systems and articles of manufacture are described to parallelize transistors. An example apparatus includes a first transistor on a first die and a second transistor on a second die. The example apparatus includes a parallel feedback terminal coupled to the first die and the second die and a current sensor including a first contact and a second contact. The example apparatus includes a resistor coupled to the current sensor and at least one of the switched terminal or a ground terminal. The example apparatus includes an active drive controller including a first input coupled to the resistor, a second input coupled to the parallel feedback terminal, and an output coupled to the parallel feedback terminal. The example apparatus includes an edge delay controller adapted to be coupled to a gate driver and an error amplifier, and a control contact adapted to be coupled to the gate driver.Type: GrantFiled: November 2, 2020Date of Patent: March 1, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Cetin Kaya, Nathan Richard Schemm
-
METHODS, APPARATUS, AND SYSTEMS TO FACILITATE A FAULT TRIGGERED DIODE EMULATION MODE OF A TRANSISTOR
Publication number: 20220037873Abstract: Methods, systems, and apparatus to facilitate a fault triggered diode emulation mode of a transistor. An example apparatus includes a driver to output a control signal to a gate terminal of a transistor of a power converter; and a diode emulation control circuit to, in response to determining a fault corresponding to the transistor, enable the transistor when current flows in a direction from a source terminal of the transistor to a drain terminal of the transistor.Type: ApplicationFiled: October 20, 2021Publication date: February 3, 2022Inventors: Serkan Dusmez, Nathan Richard Schemm, Salil Chellappan -
Methods, apparatus, and systems to facilitate a fault triggered diode emulation mode of a transistor
Patent number: 11183832Abstract: Methods, systems, and apparatus to facilitate a fault triggered diode emulation mode of a transistor. An example apparatus includes a driver to output a control signal to a gate terminal of a transistor of a power converter; and a diode emulation control circuit to, in response to determining a fault corresponding to the transistor, enable the transistor when current flows in a direction from a source terminal of the transistor to a drain terminal of the transistor.Type: GrantFiled: March 27, 2019Date of Patent: November 23, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Serkan Dusmez, Nathan Richard Schemm, Salil Chellappan -
Patent number: 11171616Abstract: A first branch group circuit includes a first branch circuit receiving a first RF input signal and first control information; and a second branch circuit receiving the first input signal and second control information. Each of the first and second branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit remains on. A second branch group circuit includes: a third branch circuit receiving a second RF input signal and third control information; and a fourth branch circuit receiving the second input signal and fourth control information. Each of the third and fourth branch circuits includes a power amplifier. The fourth control information enables the fourth branch circuit to be switched on or off while the third branch circuit remains on. A combiner combines output signals of the power amplifiers to produce an output signal.Type: GrantFiled: January 28, 2019Date of Patent: November 9, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aritra Banerjee, Rahmi Hezar, Lei Ding, Nathan Richard Schemm
-
Publication number: 20210199515Abstract: Methods, apparatus, systems and articles of manufacture to trim temperature sensors are disclosed. An example method includes: sampling a first value indicative of a temperature of a first die of a multi-chip module (MCM) with a first temperature sensor, the first die including a first transistor having a channel including a first material; and calibrating a second temperature sensor configured to sample a second value indicative of a temperature of a second die including a second transistor have a second channel including a second material, the calibrating based on the first value.Type: ApplicationFiled: December 31, 2019Publication date: July 1, 2021Inventor: Nathan Richard Schemm
-
METHODS, APPARATUS, AND SYSTEMS TO FACILITATE A FAULT TRIGGERED DIODE EMULATION MODE OF A TRANSISTOR
Publication number: 20200313421Abstract: Methods, systems, and apparatus to facilitate a fault triggered diode emulation mode of a transistor. An example apparatus includes a driver to output a control signal to a gate terminal of a transistor of a power converter; and a diode emulation control circuit to, in response to determining a fault corresponding to the transistor, enable the transistor when current flows in a direction from a source terminal of the transistor to a drain terminal of the transistor.Type: ApplicationFiled: March 27, 2019Publication date: October 1, 2020Inventors: Serkan Dusmez, Nathan Richard Schemm, Salil Chellappan -
Patent number: 10644702Abstract: A level shifter includes a signal generator that generates differential signals on a first output and a second output. A first capacitor is coupled between the first output and a first node and a second capacitor is coupled between the second output and a second node. A third capacitor is coupled between the first node and a first voltage potential, wherein the capacitance of the third capacitor is variable. A fourth capacitor is coupled between the second node and the first voltage potential, wherein the capacitance of the fourth capacitor is variable.Type: GrantFiled: August 22, 2018Date of Patent: May 5, 2020Assignee: Texas Instruments IncorporatedInventor: Nathan Richard Schemm
-
Publication number: 20190173438Abstract: A first branch group circuit includes a first branch circuit receiving a first RF input signal and first control information; and a second branch circuit receiving the first input signal and second control information. Each of the first and second branch circuits includes a power amplifier. The second control information enables the second branch circuit to be switched on or off while the first branch circuit remains on. A second branch group circuit includes: a third branch circuit receiving a second RF input signal and third control information; and a fourth branch circuit receiving the second input signal and fourth control information. Each of the third and fourth branch circuits includes a power amplifier. The fourth control information enables the fourth branch circuit to be switched on or off while the third branch circuit remains on. A combiner combines output signals of the power amplifiers to produce an output signal.Type: ApplicationFiled: January 28, 2019Publication date: June 6, 2019Inventors: Aritra Banerjee, Rahmi Hezar, Lei Ding, Nathan Richard Schemm
-
Patent number: 10250192Abstract: An outphasing amplifier includes a first class-E power amplifier having an output coupled to a first conductor and an input receiving a first RF drive signal. A first reactive element is coupled between the first conductor and a second conductor. A second reactive element is coupled between the second conductor and a third conductor. A second class-E power amplifier includes an output coupled to a fourth conductor and an input coupled to a second RF drive signal, a third reactive element coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load. An efficiency enhancement circuit is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits are coupled to the first and fourth conductors, respectively.Type: GrantFiled: September 19, 2017Date of Patent: April 2, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Aritra Banerjee, Joonhoi Hur, Baher Haroun, Nathan Richard Schemm, Rahmi Hezar, Lei Ding