Patents by Inventor Nathan T. Egan

Nathan T. Egan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10579086
    Abstract: In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: March 3, 2020
    Assignee: Analog Devices, Inc.
    Inventors: Haiyang Zhu, Wenhua W. Yang, Nathan T. Egan
  • Publication number: 20180348806
    Abstract: In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.
    Type: Application
    Filed: August 13, 2018
    Publication date: December 6, 2018
    Applicant: Analog Devices, Inc.
    Inventors: Haiyang ZHU, Wenhua W. YANG, Nathan T. EGAN
  • Patent number: 10048714
    Abstract: In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: August 14, 2018
    Assignee: ANALOG DEVICES, INC.
    Inventors: Haiyang Zhu, Wenhua W. Yang, Nathan T. Egan
  • Publication number: 20150220100
    Abstract: In an example embodiment, a circuit is provided that includes a current source with a calibrated trim circuit whose output current varies with transconductance of the current source, and tracks a current mismatch between the current source and another current source under varying bias currents and temperatures. The trim circuit may include at least one calibration digital to analog converter (CAL DAC), which may be driven by a bias circuit generating current proportional to the transconductance of the current source. In an example embodiment, the trim circuit may include at least two CAL DACs, whose output current may vary with bias current only, and with bias current and temperature. A method to calibrate the CAL DACs includes varying calibration settings of the CAL DACs under different bias currents until the output current of the trim circuit substantially accurately tracks the current mismatch under disparate bias currents and temperatures.
    Type: Application
    Filed: January 31, 2014
    Publication date: August 6, 2015
    Applicant: ANALOG DEVICES, INC.
    Inventors: Haiyang Zhu, Wenhua W. Yang, Nathan T. Egan